Candidate: Bolun Cui
Title: 22-GHz to 32-GHz Low-Noise Amplifier Design in 22-nm CMOS-SOI Technology
Date: January 9, 2019
Time: 11:30 AM
Supervisor(s): Long, John R.
This thesis explores the use of a 22-nm CMOS-SOI technology in the design of a two-stage amplifier which targets wide bandwidth, low noise and modest linearity in the 28-GHz band.