Future undergraduate engineering students are invited to join us for an admissions-focused webinar that will focus on the admissions process and cover topics like how to apply, tips for your Admissions Information Form (AIF), and more!
Our panellists will include our Director/Associate Director of Admissions as well as current students who successfully went through the process themselves.
Candidate: Ian Elmor Lang
Title: Worst-Case Latency Analysis for the Versal Network-on-Chip
Date: December 16, 2021
Supervisor(s): Kapre, Nachiket - Pellizzoni, Rodolfo
The recent line of Versal FPGA devices from Xilinx Inc. includes a hard NetworkOn-Chip (NoC) embedded in the programmable logic,
designed to be a high-performance system-level interconnect. While the target markets for Versal devices include applications
Beginning September 23rd, and continuing every Thursday through this term, Dean Mary Wells will be available on the 1st floor of E7, outside the C&D, from 3-5 pm for a chat and to connect.