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URL:https://uwaterloo.ca/electrical-computer-engineering/events/phd-seminar
 -hardware-implementation-high-speed-low-power
LOCATION:EIT 200 University Avenue West Room 3151-3153 Kitchener ON N2L 3G1
  Canada
SUMMARY:PhD Seminar: Hardware Implementation of a High-Speed Low-Power Deco
 der\nfor Low Density Lattice Codes
CLASS:PUBLIC
DESCRIPTION:Candidate: Rachna Srivastava\n\nTitle: Hardware Implementation 
 of a High-Speed Low-Power Decoder for\nLow Density Lattice Codes\n\nDate: 
 July 16\, 2018\n\nTime: 2:00 pm\n\nPlace: EIT 3151-3153\n\nSupervisor(s): 
 Gaudet\, Vincent - Mitran\, Patrick\n\nAbstract:
DTSTAMP:20260505T063731Z
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