Friday, June 12, 2015 4:30 pm
-
4:30 pm
EDT (GMT -04:00)
The
David
R.
Cheriton
School
of
Computer
Science
presents:
Margaret
Martonosi
Princeton
Friday,
June
12
DC
1302
4:30
p.m
Power-Aware Computing, Heterogeneous Parallelism, and the Post-ISA Era
Abstract:
Computer
systems
have
faced
significant
power
challenges
at
many
points
in
their
history,
but
over
the
past
20
years,
these
challenges
have
shifted
from
mainly
being
addressed
at
the
devices
and
circuits
level,
to
their
current
position
as
first-order
constraints
for
architects
and
software
developers.
Parallelism,
heterogeneity,
and
specialization
have
been
major
architecture
levers
for
achieving
power
efficiency,
especially
inside
smartphones
and
mobile
devices.
Unfortunately,
they
greatly
reduce
the
abstraction
value
of
instruction
set
architectures,
and
as
a
result,
they
come
with
increased
challenges
for
software
reliability,
interoperability,
and
performance
portability.
My
talk
will
discuss
work
both
by
my
own
group
and
by
the
field
overall
to
address
power
challenges
while
meeting
performance,
reliability
and
portability
goals
on
platforms
from
smartphones
to
datacenters.
Speaker's Biography:
Margaret
Martonosi
is
the
Hugh
Trumbull
Adams
'35
Professor
of
Computer
Science
at
Princeton
University,
where
she
has
been
on
the
faculty
since
1994.
Martonosi's
research
focuses
on
computer
architecture
and
mobile
computing,
particularly
power-efficient
systems.
Past
projects
include
the
Wattch
power
modeling
tool
and
the
ZebraNet
mobile
sensor
network,
which
was
deployed
for
wildlife
tracking
in
Kenya.
Martonosi
is
a
Fellow
of
both
IEEE
and
ACM.
Her
major
awards
include
Princeton
University's
2010
Graduate
Mentoring
Award,
the
Anita
Borg
Institute's
2013
Technical
Leadership
Award,
and
NCWIT's
2013
Undergraduate
Research
Mentoring
Award.