DSG Seminar Series • The Rise of ‘ScaleFlex’ – Modern Hardware Requires Modern Solutions

Speaker: Wolfgang Lehner and Alexander Krause, TU Dresden

Location: Over zoom

Abstract:

ScaleUp and ScaleOut architectures have guided the design and development of scalable database engines in the last decade. However, upcoming hardware developments are promoting highly disaggregated computing platforms, which allow a “best of breed” approach and require a systematic separation of compute and storage. Within this presentation, we will outline the potential and challenges of dis-aggregated memory infrastructures for database systems. We will also report on recent research contributions that strive to extend compile and runtime components of database systems, in order to cope with specialized hardware components, like leveraging FPGAs, thus pushing the envelope of highly efficient next-generation database engines.

Bio: Wolfgang Lehner is Director of the Institute of Systems Architecture and head of the Database Research Group at TU Dresden, Germany. His research focuses on database system architectures specifically looking at crosscutting aspects from data engineering algorithms and efficient data structures up to hardware-related aspects. He is internationally visible within the research community with presentations, tutorials, and demos and maintains a strong network of academic and industrial partners. Wolfgang Lehner serves the international data management community in many roles, being Co-PC-chair of many conferences and workshops, member of editorial boards and reviewing committees, and acts as the Managing Editor of “Proceedings of the VLDB Endowment” (PVLDB). He also serves on the grants committee of collaborative research centers within the German Research Foundation (DFG). He is an appointed member of the German Science and Humanities Council and of the Academy of Europe.

Alexander Krause is a PostDoc at TU Dresden’s Database Research Group, chaired by Wolfgang Lehner. His dissertation on “Graph Pattern Matching on Symmetric Multiprocessor Systems” focused on energy-efficient and adaptive graph processing. Alexander is an appointed member of the SIGMOD Availability and Reproducibility Committee (ARC). Previously, he served as the Proceedings Chair for BTW 2021 and 2023 in Dresden. His research mainly focuses on the design of scalable data system in the context of disaggregated systems by leveraging RDMA and CXL.