ECE 222 Digital Computers (Fall 2024)

 

Overview

The objective of this course is to learn how computer works, focusing on how the computer hardware executes the software. General topics covered in this course: computer abstractions, instruction sets, assembly language programming, processor design, memory system design, and input/output. Prereq: ECE 124 & CS 137 (or equivalent)

 

Instructor

Ziqiang Patrick Huang <ziqiang.huang@uwaterloo.ca> E7-5424

 

Lab Instructor

Julius Olajos <jnjolajos@uwaterloo.ca>

 

Teaching Assistants

Md. Milon Islam  <m46islam@uwaterloo.ca>

Wafic Lawland <wlawand@uwaterloo.ca>

Refik Yalcin <ryalcin@uwaterloo.ca>

Leroy D'Souza <l8dsouza@uwaterloo.ca>

Rino Loka <rloka@uwaterloo.ca>

 

Lectures, tutorials, labs

For lecture, tutorial and lab schedules, see the Undergraduate Schedule of Classes. Labs are mandatory. Tutorials are used to 1) introduce labs and 2) explain problem sets to help prepare for exams.

 

Makeup Lectures (Section 001 (ECE) only. Section 002 (SE) doesn't have makeup lecture slots)

Whether makeup lectures will be used will depend on the pace of the course. Students will be notified (in class & through emails) beforehand if we intend to use any of them.

 

Discussion Forum

We will use Piazza for class discussions. The system is highly catered to getting you help fast and efficiently from classmates, the TAs, the lab instructor and myself. Rather than emailing questions to the teaching staff, you should post your questions on Piazza. The Piazza course site is here

 

Office Hours

Patrick: by appointment (Email me and we will set up a time)

TAs: during lab sessions & by appointment (Please include all the TAs in the email when booking an appointment)

 

Textbook

Hennessy and Patterson. “Computer Organization and Design: The Hardware/Software Interface, RISC-V Edition" Second Edition, (Not the MIPS or ARM edition)

 

Assessment

Labs: 30%
Midterm: 30%
Final: 40%
 

Labs

  • See the lab manual on Learn for instructions
  • Labs are done in pairs.
  • Demos are done during your scheduled lab period.  (There is a 100% penalty for late demos so be sure to contact the lab instructor if something prevents you from demoing during the scheduled lab period.)
  • Reports are due within 48 hours of your scheduled lab period and there is a 25% per day (including weekends) late penalty.
  • Failure to complete all labs will result in a course grade of INC (incomplete).
  • AI tools such as GitHub Copilot and ChatGPT may not be used to complete the labs.
Component Weight
Lab 0 - Intro to RISC-V Platform 5%
Lab 1 - Flashing LED 20%
Lab 2 - Subroutines, Parameters Passing 25%
Lab 3 - Input/Output Interfacing 25%
Lab 4 - Interrupt Handling 25%

 

Assignment Screening

Plagiarism detection software such as MOSS (https://theory.stanford.edu/~aiken/moss/) may be used for lab code.

 

Tentative Course Schedule

 

Week  Date Activity

Topics

Assigned Reading

from the textbook

1 Sep 4-6  

Introduction

Chapter 1

2

3

4

5

Sep 9-13

Sep 16-20

Sep 23-27

Sep 30-Oct 4

Lab 0

Lab1 tut

Lab 1, PS1 tut

Lab2 tut

Instruction Sets and Assembly Programming

Chapter 2: 2.1 -2.14

6

7

8

9

10

Oct 7-11

Oct 14-18

Oct 21-25

Oct 28-Nov 1

 Nov 4-8

Lab 2, PS2 tut

Reading week

Midterm*

Lab3 tut

Lab3, PS3 tut

Processor Design: Datapath and Control;

Pipelining and Hazards

Chapter 4: 4.1-4.11                                       

11

12

13

Nov 11-15

Nov 18-22

Nov 25-29

Lab4 tut

Lab 4, PS4 tut

PS5 tut

Memory, Caches and Virtual Memory

Chapter 5.1-5.4, 5.7-5.8
14 Dec 2   Review  

 

*Midterm