Ultra-wideband (UWB) is a wireless system which transmits signals across a much wider frequency spectrum than traditional wireless systems. The impulse radio (IR) UWB technique uses ultra-short duration pulses of nanoseconds or less. The objective of this thesis is to provide the design, implementation and testing of the timing recovery between the transmitter and receiver of the recently emerging differential code-shifted reference (DCSR) Impulse radio (IR) ultra-wideband (UWB) system. A new non-coherent energy detection based technique and its algorithm are proposed for timing recovery by means of a phase-locked loop (PLL) circuit. Simulations are presented first to verify the proposed algorithm. Then, it is implemented and tested in the Lattice ECP2 field-programmable gate array (FPGA) evaluation board with VHDL codes (a VHSIC hardware description language). The simulation and implementation results show that the proposed timing recovery scheme can be effectively achieved without much error.