Jaesik Lee

PhD student

Contact Information

Phone: (65)-6770-5432
Email: leej@ime.a-star.edu.sg

Microsystems, Modules & Components Laboratory
Institute of Microelectronics (IME)
11 Science Park Road
Singapore Science Park II 117685

Biographical Information

Since February 2010: Senior Research Engineer, Institute of Microelectronics, Singapore
2008 to 2010: Senior Engineer, Samsung Electronics (System LSI), Korea
2004 to 2008: PhD degree, University of Waterloo, Canada
2002 to 2004: MSc degree, University of Seoul, Korea
1994 to 2002: BSc degree, University of Seoul, Korea

Research Interests

  • FlipChip packaging process development in Chip to Package Interconnection (CPI)
  • Packaging process development with Ultra Low-k dielectrics (32nm and 28nm CMOS technologies)
  • Embedded Wafer Level Package (EWLP), Package on Package (POP) through Silicon via (TSV), Cu-Sn-Cu and Cu-Cu bonding