Citation:
Mirosanlou, R. , Guo, D. , Hassan, M. , & Pellizzoni, R. . (2020). MCsim: An Extensible DRAM Memory Controller Simulator. IEEE Computer Architecture Letters, 19(2), 105-109. Retrieved from https://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=9137661
Abstract:
Numerous proposals for memory controller (MC) designs have beenexposed to the research community. Interest has since been growing in the area ofcomputer architecture and real-time systems to improve the throughput of thesystem and/or guarantee timing requirements through novel scheduling algorithms.Consequently, comprehensive simulators are highly demanded since they providean infrastructure for development of new ideas effectively without re-implementingthe other parts of the hardware. Although there has been several proposals foroff-chip memory device simulators, there is a shortage in their MC counterparts.In this letter, we propose MCsim, an extensible and cycle-accurate MC simulator.Designed as an integrable environment, MCsim is able to run as a trace-basedsimulator as well as provide an interface to connect with external CPU and memorydevice simulators.
