PhD Seminar: Modeling of MOSFET Transport: Drift-Diffusive to Quasi-Ballistic and Room-Temperature to Cryogenic

Friday, July 24, 2026 9:00 am - 10:00 am EDT (GMT -04:00)

Candidate: Dylan Ma
Date: July 24, 2026
Time: 9:00 AM
Location: Online
Supervisor: Lan Wei

All are welcome!

Abstract:

The continued scaling of CMOS technologies has enabled the digital revolution that has dominated the 21st century. The semiconductor's continued pursuit of improved compute capabilities in the post Moore era will rely on will rely on innovations at all levels from materials to systems. For example, novel materials or device architectures such as III-V semiconductors and tunnel FETs have proposed and investigated to replace or complement Si MOSFET in the FEOL process. Recently, AOS materials are also being actively studied to offer switching capabilities through BEOL process. Other paradigms such as quantum computing promise to solve problems intractable on classical computers, though such devices will still rely on classical CMOS to generate control signals and read outputs which in turn may require the CMOS to operate at cryogenic temperatures as close to the qubits as possible.

This seminar reviews the physics of drift-diffusive and quasi-ballistic (long and short channel) MOSFETs and the presents the development of a unified compact model for channel current, charge and noise validated across channel lengths. Currently, most widely adopted Si MOSFET compact models are based on drift-diffusive transport with a variety of correction terms added to bridge the gap to quasi-ballistic transport though these correction terms obfuscate physical effects from the designer that a unified model would be able to reveal. Next, the problem of MOSFETs operating at cryogenic temperatures is tackled with the NEGF approach and both the transport and noise properties are investigated as a function of temperature. The roles of elastic and inelastic scattering are analyzed to understand their impacts on the transport and noise from room temperature to cryogenic. Last but not the least, the physical behavior of recently proposed AOS TFTs are analyzed to understand the contributions and impacts from the intrinsic channel and extrinsic regions. Material and device effects such as its unique conduction mechanisms or the source/drain overlap regions and trapping's effect on current and capacitance are investigated. A fully scalable compact modeling is also introduced and validated, highlighting the unique intrinsic and extrinsic phenoma present in AOS devices.