Speaker: Jeonghyun Woo
Date: Monday, March 23, 2026
Time: 11:00 am to noon
Location: EIT 3142
All are welcome.
Abstract:
As computing systems become integral to critical infrastructure, including cloud services and artificial intelligence, their security is fundamentally determined by the underlying hardware. Despite this importance, hardware vulnerabilities persist as a significant and frequently overlooked risk. Physical-level vulnerabilities can bypass all software-based protections, and, paradoxically, certain hardware defenses may introduce additional attack vectors. This talk will illustrate these challenges through the example of RowHammer, a prominent hardware vulnerability in commodity DRAM.
My talk will showcase methods to bypass advanced RowHammer defenses previously regarded as secure and introduce principled mitigations that restore robust protection with minimal performance overhead. Furthermore, I will show that even these mitigations can inadvertently create exploitable timing side channels and present comprehensive defenses to address these issues. Extending beyond memory, I will discuss how hardware faults directly threaten AI safety by introducing PrisonBreak, the first hardware-induced jailbreak of safety-aligned large language models through targeted bit flips. I will conclude by outlining a research agenda encompassing four key areas: securing emerging memory technologies against new physical threats, developing trustworthy AI-serving infrastructure, strengthening confidential computing, and leveraging AI for automated hardware assurance. Collectively, these initiatives aim to establish hardware as a reliable foundation for future computing systems.
Biography:
Jeonghyun Woo is a PhD candidate in Electrical and Computer Engineering at the University of British Columbia (UBC), advised by Prof. Prashant Nair in the Systems and Architectures (STAR) Lab. His research lies at the intersection of computer architecture, hardware security, and AI safety, where he takes an offensive-first approach, breaking deployed defenses to expose fundamental vulnerabilities, then designing principled, low-overhead mitigations that provide provable security. His work has directly shaped the security landscape of DRAM memory systems, with contributions that have influenced the designs of leading memory companies. His research spans attack discovery, secure mitigation design, and side-channel analysis, and extends to AI safety through co-developing the demonstration of hardware-induced jailbreaks against safety-aligned large language models. His work has been recognized with the Best Paper Award at HPCA 2023 and the Distinguished Artifact Award at HPCA 2025, and has been published at top computer architecture venues, including ISCA and HPCA.
More information: https://jeonghyunwoo0306.github.io/