Vincent Gaudet

Vincent Gaudet is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo.

His research interests focus on high-speed and energy-efficient microelectronic circuits applied to digital communication systems and signal processing. He is particularly interested in stochastic computing systems and multiple-valued logic. He has worked on low-density parity-check (LDPC) and turbo decoders, multiple-access channels, implantable neural recording systems, and integrated lab-on-chip instrumentation circuitry.

Professor Gaudet is currently a Senior Member of the IEEE, and holds many editorial positions. In 2009, he received the Petro Canada Young Innovator Award to recognize and support his work of outstanding young faculty-based research.

• VLSI circuits
• Analog circuits
• Mixed-signal circuits
• Digital circuits
• CMOS design
• Low-power circuits
• LDPC decoding
• Turbo decoding
• Iterative decoding
• Stochastic computation
• Connectivity and Internet of Things
• Digital design and fabrication technologies
• Embedded systems
• Information systems
• Sensors and devices
• Wireless communications/networking
• Microelectronic circuits
• Digital communications
• signal processing
• Connectivity and Internet of Things
• IoT
• Devices

• 2003, Doctorate, Electrical Engineering, University of Toronto
• 1997, Master of Applied Science, Electrical Engineering, University of Toronto

• ECE 240 - Electronic Circuits 1
  • Taught in 2022
• MTE 421 - Linear and Nonlinear Electronics
  • Taught in 2022

• Gaudet, Vincent and Butler, Jon T and Wille, Robert and Homma, Naofumi, Guest Editorial Emerging Topics in Multiple-Valued Logic and Its Applications, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 6(1), 2016, 1 - 4
• Gaudet, Vincent, A Survey and Tutorial on Contemporary Aspects of Multiple-Valued Logic and Its Application to Microelectronic Circuits, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 6(1), 2016, 5 - 12
• Onizawa, Naoya and Gross, Warren J and Hanyu, Takahiro and Gaudet, Vincent C, Clockless stochastic decoding of low-density parity-check codes: Architecture and simulation model, Journal of Signal Processing Systems, 76(2), 2014, 185 - 194
• Onizawa, Naoya and Gross, Warren J and Hanyu, Takahiro and Gaudet, Vincent C, Asynchronous Stochastic Decoding of LDPC Codes: Algorithm and Simulation Model, IEICE TRANSACTIONS on Information and Systems, 97(9), 2014, 2286 - 2295
• Pierce, I and Chuang, Jen and Sachdev, Manoj and Gaudet, Vincent C, A 167-ps 2.34-mW Single-Cycle 64-Bit Binary Tree Comparator With Constant-Delay Logic in 65-nm CMOS, IEEE Transactions on Circuits and Systems I: Regular Papers, 61(1), 2014, 160 - 171

• Currently considering applications from graduate students. A completed online application is required for admission; start the application process now.