Current graduate students

The Waterloo Institute for Nanotechnology (WIN) has four main thematic research areas; Smart and Function Materials, Connected Devices, Next Generation Energy Systems and Therapeutics and Theranostics. To showcase the work going on within these areas, we will be holding monthly WIN Thematic Seminars featuring our members and their research group members.

The Waterloo Institute for Nanotechnology (WIN) has four main thematic research areas; Smart and Function Materials, Connected Devices, Next Generation Energy Systems and Therapeutics and Theranostics. To showcase the work going on within these areas, we will be holding monthly WIN Thematic Seminars featuring our members and their research group members.

Wednesday, January 19, 2022 4:00 pm - 5:00 pm EST (GMT -05:00)

Quantum Nano Collision Seminar Series: Professor Kevin Musselman

The Waterloo Institute for Nanotechnology (WIN) has launched a new seminar series, Quantum Nano Collision (QNC) Seminar Series, to deepen the engagement of the Waterloo researchers who work at the interface of quantum and nanotechnologies. This seminar series will also provide opportunities for senior graduate students, post-doctoral fellows, and research associates to present their innovative work along with the faculty members to bring together the excitement around these cutting-edge technologies that would shape our future.

The next talk for the QNC Seminar Series will be delivered by Professor Kevin Musselman.

Candidate: Zack Strike
Title: Preliminary Development of a Microfluidic Tool for the Characterization of Molecular Machines
Date: December 14, 2021
Time: 13:00
Place: online
Supervisor(s): Backhouse, Chris (Adjunct) - Wright, Derek

Abstract:
Droplet interface bilayers (DIBs) have been proposed as a key tool to better study transmembrane proteins and their quantum
biology. This work focused on developing a microfluidic device for the formation of DIBs.

Thursday, December 16, 2021 3:00 pm - 3:00 pm EST (GMT -05:00)

Worst-Case Latency Analysis for the Versal Network-on-Chip

Candidate: Ian Elmor Lang
Title: Worst-Case Latency Analysis for the Versal Network-on-Chip
Date: December 16, 2021
Time: 15:00
Place: online
Supervisor(s): Kapre, Nachiket - Pellizzoni, Rodolfo

Abstract:
The recent line of Versal FPGA devices from Xilinx Inc. includes a hard NetworkOn-Chip (NoC) embedded in the programmable logic,
designed to be a high-performance system-level interconnect. While the target markets for Versal devices include applications