Speaker: SHIYU SU
Topic: BREAKING THE IC DESIGN BOUNDARIES FOR THE BLURRING CYBER AND PHYSICAL WORLDS
Date: WEDNESDAY APRIL 13, 2022
Time: 10:00 – 11:00 am
Zoom: https://uwaterloo.zoom.us/j/92637460034?pwd=bWExaXo0TERGNTN0T0E1dFNGSTVYZz09
Meeting ID: 926 3746 0034
Passcode: 513763
Abstract:
As the boundaries between cyber and physical worlds blur, massive amounts of data are being generated and need to be received, stored, processed, and transmitted. Faster, smarter, and more reliable networks and devices are required to handle the variety and volume of data. On the other hand, after driving integrated circuit (IC) design for over 50 years, Moore’s law is running out of steam—technology scaling is slowing down; furthermore, it no longer leads to lower costs due to increasing design costs.
In this talk, I will explore a new pathway to address this increasing supply-demand imbalance from an IC designer’s point of view and, more importantly, to enable the next technological advance by leveraging the ongoing blurring interfaces between the digital and analog domains and the new wave of design methodology innovations. Starting from the IC design, I will discuss the application of intensive digital signal processing and mixed-signal techniques in analog/mixed-signal/RF circuit design for architectural-level breakthroughs with orders-of-magnitude improvement in system performance and flexibility. By effectively using time-domain signal processing and approximation, I made fundamental analog blocks more “digital-like,” which maximally leverages the fast devices offered by technology scaling and overcomes the limitations of advanced technology nodes (i.e., low supply voltages). I will present several benchmarking design examples of high-speed (>GS/s) data converters and RF/mm-wave transceivers with silicon prototypes and measurement results. Then, I will present novel design methodologies and flows for analog/mixed-signal/RF design automation, leveraging the
advancements of mostly digital circuit architectures and machine learning algorithms for considerably reducing chip design costs and iteration time. I will conclude the talk with my visions for new areas of research and applications enabled by these innovations in circuit architecture and design methodology.
Biography:
Shiyu Su (S’14–M’19) received the B.S. degrees from Beijing University of Post and Telecommunication, China and Queen Mary, University of London, UK, in 2011 and the M.S. and Ph.D. degree from University of Southern California (USC), Los Angeles, in 2013 and 2019, all in electrical engineering.
His research interests include high-speed data converters, phase-locked loop, RF/mm-Wave transceivers, electronic design automation (EDA) and micro-unmanned vehicles.
Dr. Su was the recipient of IEEE Solid-State Circuits Society (SSCS) Predoctoral Achievement Award for 2017–2018, and the IEEE SSCS Student Travel Grant Award (STGA) in 2020. He was a Ming Hsieh Institute Scholar from 2019 to 2020. From 2015 to present, he serves as a reviewer for the IEEE International Symposium on Circuits and Systems (ISCAS), IEEE Transactions on Circuits and Systems I/II (TCAS), IEEE Sensors Journal, IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), IEEE Transactions on Very Large-Scale Integrated Systems (TVLSI), IEEE Transactions on Microwave Theory and Techniques (TMTT), IEEE Access, IEEE Solid-State Circuits Letters (SSC-L) and IEEE Journal of Solid-State Circuits (JSSC).
All are welcome!