Bahareh Ebrahimi Sadrabadi
Design and Implementation of a Multi-Channel Field-Programmable Analog Front-End For a Neural Recording System
Neural recording systems have attracted an increasing amount of attention in recent years, and researchers have put major efforts into designing and developing devices that can record and monitor neural activities. Understanding the functionality of neuron can be adopted to develop neuroprosthetics for restoring damages in nervous systems. Analog front-end block is one of the main components in such systems by which the neuron signals are amplified and processed for further analysis.
In this work, our goal is to design and implement a field-programmable 16-channel analog front-end block, where its programmability is used to deal with process variation in the chip. Each channel consists of a two stage amplifier as well as band pass filter with digitally tunable low corner frequency. The sixteen recording channels are designed using four different architectures. The first group of recording channels employs one low noise amplifier (LNA) as the first stage amplifier and a fully differential amplifier for the second stage along with an NMOS transistor in the feedback loop. In the second group of architectures, we use LNA as the first stage and a single-ended amplifier for implementing the second stage. The groups three and four have the same design as groups one and two where the NMOS transistors in feedback loop are replaced by PMOS transistors.
In our design, the circuits are optimized for low noise and low power consumption. Our experiments show the recording channel has a gain of 76.7 dB and input-referred noise of 6.9 µVrms over 0.1 Hz to 1 GHz. The chip is fabricated in AMS 0.35 µm CMOS technology for a total die area of 3 mm×3 mm and consumes 2.7 mW power. Moreover, the chip is tested on a PCB board that can be employed for in-vivo recording.