Candidate: Rabiul Islam
Title: Tunable Volatile and Multi-bit Non-volatile Resistive Memory for Neuromorphic Computing Applications
Date: December 11, 2024
Time: 9:00 AM
Place: REMOTE ATTENDANCE
Supervisor(s): Miao, Guo-Xing - Sachdev, Manoj
Abstract:
In the existing computing paradigm, to compute a function, data from memory needs to be transferred to the processor and upon processing the data, results need to move back to memory again to complete the computation. This data movement process consumes a significant amount of energy. Moreover, the computing process is limited by the bandwidth of the data bus and increased latency. Therefore, alternative non-von Neumann computing architectures, especially neuromorphic computing and in-memory computing architectures, have been extensively investigated by researchers. In neuromorphic computing (NC) architecture, which is inspired by the energy-efficient biological brain, the processing elements and memory are co-located, thereby eliminating the energy cost and latency of data shuffling. CMOS-circuits-based neuromorphic computing architectures, such as Loihi and TrueNorth, have been extensively studied to emulate the synapses and neuron-like behaviour; however, they require tens of CMOS gates to imitate single neuron behaviour, which poses a challenge when large-scale neural network is needed. A single memristors-based device, on the other hand, can easily emulate the synaptic plasticity. Therefore, memristors-based neuromorphic hardware enables high integration density with low energy consumption.
In this thesis, a lithium (Li) imbued TiOx iontronic device that exhibits both volatile and non-volatile memory characteristics has been demonstrated. A solid-state electrolyte lithium phosphorus oxynitride (LiOPN) behaves as the ion source, and the embedding and releasing of Li ions inside the cathodic like TiOx renders volatile conductance responses from the device and offers a natural platform for hardware simulating neuron functionalities. In addition, the device unambiguously emulates synapse-like short-term plasticity (STP) behaviour without requiring a forming process beforehand or a compliance current during switching. Besides, these devices possess high uniformity and great endurance as no conductive filaments are present. Different short-term pulse-based phenomena, including paired-pulse facilitation (PPF), post-tetanic potentiation (PTP), and spike rate-dependent plasticity (SRDP), were observed with unique self-relaxation characteristics. Based on the voltage excitation period, the timescale of the volatile memory can be tuned. Temperature measurement reveals the ion displacement-induced conductance channels become frozen below 220 K. In addition, the same volatile analog devices can be configured into non-volatile memory units with multibit storage capabilities after an electroforming process, which is useful for in-memory computing (IMC) applications. Therefore, on the same platform, we can configure volatile units as nonlinear dynamic reservoirs for performing neuromorphic training and the non-volatile units as the weight storage layer. We proceed to use voice recognition as an example with the tunable time constant relationship and obtain 94.4% accuracy with a minimal training dataset. Thus, this iontronic platform can effectively process and update temporal information for reservoir and neuromorphic computing paradigms.
Moreover, the same lithium-imbued TiOx device was integrated on top of the CMOS tape-out chip. Due to the incompatibility of Lithium-based materials with the existing CMOS production facility, CMOS integration with Lithium-imbued TiOx devices is almost impossible. This thesis proposes a BEOL method to integrate the Li-imbued TiOx with foundry CMOS chips using an academic fabrication facility. This process will allow the other CMOS process-incompatible devices to be integrated with CMOS.
Furthermore, this thesis also proposed a Helimagnet-based Non-volatile multi-bit memory device. The device consists of a Helimagnet layer sandwiched in between two ferromagnetic layers. The writing of the proposed memory was done using an external magnetic field applied on the top free layer. The memory state can be read by using resistance measurement after each stable configuration. Consequently, this device can be used for in-memory computing (IMC) applications due to its multi-bit, non-volatile nature.