Candidate: Amr Mohamed Samir Tosson Abdelwahed
Title: Addressing the RRAM Reliability and Radiation Soft-Errors in the Memory Systems
Date: December 14, 2017
Time: 11:30 AM
Place: EIT 3145
Supervisor(s): Wei, Lan - Anis, Mohab (Adjunct) - Gebotys, Catherine H.
With the continuous and aggressive technology scaling, the design of memory systems becomes very challenging. From the application side, the desire to have high-capacity, reliable, and energy efficient memory arrays is rising rapidly. From the technology side, the increasing leakage power and the restrictions resulting from the manufacturing limitations complicate the design of the memory systems. Hence, the need to incorporate the emerging scalable non-volatile memory devices in the various systems has increased in recent years. The novel Non-Volatile Memory (NVM) devices are used in the different designs as an alternative to the traditional power saving techniques and also as a replacement to the non-scalable ?ash memory cells. In addition to this, new applications such as, the advanced neuromorphic systems requiring highly computational operations, can be achieved in a fast and energy efficient manner using the emerging NVMs.
Compared to other novel non-volatile memory devices, the Resistive Random Access Memory (RRAM) device has many advantages including its low-programming requirements, its large ratio between its high resistive state and low resistive state, and its compatibility with the Complementary Metal Oxide Semiconductor (CMOS) fabrication process. However, the RRAM device su?ers from reliability and radiation soft-errors which can alter the data saved on it.
In this thesis, we apply the RRAM to conventional and non-conventional storage systems including those used in advanced neuromorphic designs. In particular, we focus on providing various solutions for RRAM soft-errors (reliability and radiation effects) in those systems. In each of those designs, we explain the suggested modi?cation and we demonstrate through the various simulation results the ability of the proposed techniques in detecting, ?xing, and minimizing the chances of re-occurrence of RRAM soft-errors. In addition to this, the required circuit modifications for implementing the suggested methodologies are carefully considered to ensure minimum impact on increase of the energy consumption and delay of the read and write operations of the various systems.