University of Waterloo
200 University Ave W, Waterloo, ON
N2L 3G1
Phone: (519) 888-4567
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Contact the Department of Electrical and Computer Engineering
Shahin Solki
Voltage-variation aware multi-mode timing closure of high-performance cores
Manoj Sachdev
In high-performance cores such as GPUs and CPUs, it is essential to support a wide operating voltage and temperature range, which pose a design challenge, and often leads to power, performance or silicon area penalties. In this talk, the analysis results of critical and near critical paths extracted from a SIMD-based GPU and 64-bit ARM core are provided to discuss their voltage scalability and temperature sensitivity. A set of metrics are introduced to determine design weak points and methods to improve them. Furthermore to optimize the solution, a voltage-variation aware timing methodology is described to determine effective path-based jitter margin instead of a global setting. It is accomplished by analysing voltage noise impact on clock skew, slack and path delay. The average and effective voltage are introduced as metrics to quantify voltage droop impact on the circuit timing.
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University of Waterloo
200 University Ave W, Waterloo, ON
N2L 3G1
Phone: (519) 888-4567
Staff and Faculty Directory
Contact the Department of Electrical and Computer Engineering
The University of Waterloo acknowledges that much of our work takes place on the traditional territory of the Neutral, Anishinaabeg and Haudenosaunee peoples. Our main campus is situated on the Haldimand Tract, the land granted to the Six Nations that includes six miles on each side of the Grand River. Our active work toward reconciliation takes place across our campuses through research, learning, teaching, and community building, and is centralized within our Office of Indigenous Relations.