Practical Data Compression for Modern Hierarchies

Monday, April 4, 2016 10:30 am - 11:30 am EDT (GMT -04:00)


Mr. Gennady Pekhimenko

Computer Science, Department Carnegie Mellon University



Although compression has been widely used for decades to reduce file sizes (thereby conserving storage capacity and network bandwidth then transferring files), there has been little to no use of compression within modern memory hierarchies. Why not?  Especially as programs become increasingly data-intensive, the capacity and bandwidth within the memory hierarchy (including caches, main memory, and their associated interconnects) are becoming increasingly important bottlenecks.  If data compression could be applied successfully to the memory hierarchy, it could potentially relieve pressure on these bottlenecks by increasing effective capacity, increasing effective bandwidth, and even reducing energy consumption.  

In this talk, I describe a new, practical approach to integrating data compression within the memory hierarchy, including on-chip caches, main memory, and both on-chip and off-chip interconnects. This new approach is fast, simple, and effective in saving storage space. A key insight in our approach is that access time (including decompression latency) is critical in modern memory hierarchies. By combining inexpensive hardware support with modest OS support, our holistic approach to compression achieves substantial improvements in performance and energy efficiency across the memory hierarchy. In addition to exploring compression-related issues and enabling practical solutions in modern CPU systems, we discover new problems in realizing hardware-based compression for GPU-based systems and develop new solutions to solve these problems.


Gennady Pekhimenko is a PhD candidate in the Computer Science Department at Carnegie Mellon University under the supervision of Professor Todd C. Mowry and Professor Onur Mutlu. Before that (2008-2010), he worked at the IBM Toronto Lab, Compilers Group. He received his MSc. in Computer Science in 2008 from the University of Toronto, and his B.S. in Applied Mathematics and Computer Science from Moscow State University in 2004. His research interests are on efficient memory hierarchy designs with data compression, compilers, GPUs, and bioinformatics. Gennady is serving on the PC of WWW'16 and the ERC of ISCA'16. His work is funded by NVIDIA Graduate, Microsoft Research, Qualcomm Innovation, and NSERC CGS-D fellowships.