Silicon Wars: The FPGA Awakens

Tuesday, April 19, 2016 10:30 am - 11:30 am EDT (GMT -04:00)


Nachiket Kapre

School of Computer Engineering, Nanyang Technological University, Singapore

Invited by PROFESSOR Krzysztof Czarnecki

Non-technical Abstract:

"Moore's Law has vanished. In its absence, the sinister Dark Silicon has arisen from the ashes of the foundries and will not rest until Moore, the last pioneer, has been destroyed. With the support of FPGA computing, General Intel and Altera lead the RESISTANCE. They are desperate to find the density advantage of configurable computing and gain its help in restoring energy efficiency to the silicon. Intel has sent its most daring Xeon-FPGA chip on a not-so-secret mission to Altera where they have discovered a clue to Moore's whereabouts."

Technical Abstract:

Unlike ever before, FPGA-based computing is uniquely positioned to deliver energy-efficient hardware accelerated solutions across a spectrum of applications including (a) data center workloads, as well as (b) lightweight embedded processing. In this talk, I will review recent industry trends and technological highlights that highlight the promise of FPGA-based processing. I will describe my research directions and results in three areas. 

1. Hoplite Network-on-Chip -- I show how we can design extremely lightweight FPGA NoCs that can work with modern FPGA platforms using deflection routing and unidirectional torus topologies. Compared to state-of-the-art designs from CMU and Penn, our router is 25x smaller and 1.5x faster.

2. Machine Learning for CAD -- As modern FPGA design methodologies are increasingly complex, we show how to exploit recent advances in machine learning and cloud computing to tackle the FPGA CAD optimization process for timing closure of FPGA circuits. We show that we are able to beat in-built design space exploration tools in Xilinx and Altera tools by 7-10x using our novel approach.

3. Deep Learning for IoT -- We make a case for deploying FPGA-cased overlay vector processors in embedded/IoT applications requiring object classification with few class labels. Compared to recent GPU-based SoCs and other DSP platforms, our solution delivers high performance and energy efficiency on standard computer vision datasets.


Nachiket Kapre is an Assistant Professor at Nanyang Technological University, Singapore in the School of Computer Engineering and CTO at Plunify, Inc. in Singapore. He received his M.S in Electrical Engineering (2005) and Computer Science (2006) and a PhD in Computer Science (2010) from California Institute of Technology, Pasadena. He was awarded the Junior Research Fellowship at Imperial College London. He is primarily interested in understanding and exploiting the potential of parallel, spatial architectures such as FPGAs for energy-efficient computing. He has won best paper awards for work presented at FPT 2011 and FPL 2015, HiPEAC paper award for FCCM 2013, along with influential paper award (2013) for FCCM 2006. He has co-chaired FPT 2015 and is involved in Program Committees for various FPGA conferences such as FPL, FPT and FCCM.