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IQC presents Chanda Prescod-Weinstein in conversation with Kayleigh Platz In The Disordered Cosmos: A Journey into Dark Matter, Spacetime, & Dreams Deferred

Friday, November 5, 2021 12:00 pm - 1:00 pm EDT (GMT -04:00)

Engineering Graduate Studies Alumni Panel

Join us on November 5 as we welcome Alumni from our graduate programs to speak about the impact their graduate degree had on their career path. This is a great event to attend if you are curious about how a graduate degree in engineering can support you!

Date: Friday, November 5
Time: 12pm-1pm EDT

Panelists:

Monday, November 8, 2021 12:00 pm - 12:00 pm EST (GMT -05:00)

Quantum Today: Simulating Quantum Particles on a Lattice

Join Chris Wilson, faculty member at the Institute for Quantum Computing (IQC) and the Department of Electrical and Computer Engineering, in conversation with scientific outreach manager John Donohue.

water talks event image with erin mahoney headshot

As part of the Water Institute's WaterTalks lecture series, Erin Mahoney,
Commissioner of Environmental Services for York Region and Douglas Wright
Engineer-in-Residence will present: York Region’s One Water Story…
recognizing the value of water in all its forms.

Thursday, November 25, 2021 4:00 pm - 5:00 pm EST (GMT -05:00)

How I Got Into Quantum: A Graduate Student Perspective

Meet graduate student researchers from science,
engineering, and mathematics and hear how they discovered quantum information
science found their way into research, and how the skills they gained in
their undergraduate studies are helping them develop the next generation of
quantum technology.

Friday, November 26, 2021 6:00 pm - 6:00 pm EST (GMT -05:00)

Implementing FPGA-optimized Systolic Arrays using 2D Knapsack and Evolutionary Algorithms

Candidate: Harry Chan Chan
Title: Implementing FPGA-optimized Systolic Arrays using 2D Knapsack and Evolutionary Algorithms

Date: November 26, 2021
Time: 18:00
Place: MS Teams
Supervisor(s): Kapre, Nachiket

Abstract:
Underutilization of FPGA resources is a significant challenge in the deployment of FPGAs as neural network accelerators.
We propose an FPGA-optimized systolic array architecture to improve the CNN inference throughput by orders of magnitude through