ECE 637 - Digital CMOS Integrated Circuits
Instructor
Professor Manoj Sachdev
Lectures
Thursdays 2:30pm-5:20pm in EIT 3141
Calendar description
Design of CMOS digital integrated circuits at the transistor level. Related topics include MOSFET switch and models, logic gate design, transistor sizing, interconnect parasitics, gate delay, timing design, logical effort, static and dynamic logic families, latch and flip-flop elements, arithmetic circuits.
Prerequisite
ECE 445
Detailed description
-
MOS
Transistor
-
Review
(6
lecture
hours)
- Static behavior
- Parasitic capacitances and dynamic behavior
- Short channel effects
- Concept of scaling and trends
- SPICE MOS models
- Process variations and process impact
-
MOS
Inverter
(6
lecture
hours)
- Properties
- Static behavior – switching threshold, Noise margin
- Dynamic behavior – capacitance, propagation delay
- Power, energy consumption and power-delay, energy-delay products
- Layout considerations/design rules
-
CMOS
Combinational
Circuits
(6
lecture
hours)
- Implementation styles Static, ratioed, pass transistor, CPL, dynamic logic
- Signal integrity issues in dynamic circuits
- Cascading of dynamic circuits
- Logic styles for low power and high performance applications
-
CMOS
Sequential
Circuit
(6
lecture
hours)
- Timing metrics for sequential circuits
- Static and dynamic sequential flip-flops and latches
- High speed pipeline circuits
-
Interconnect
Parasitics
(3
lecture
hours)
- Capacitive parasitics, modeling, cross talk
- Resistive parasitics, modeling, IR drop, electromigration
- Inductive parasitics
-
Timing
Issues
in
Digital
Circuits
(5
lecture
hours)
- Single-phase and two-phase clocking
- Clock skew and jitter
- Clock generation and distribution
- Self-timed circuit design
- Synchronizers and arbiters
-
CMOS
Arithmetic
Circuits
(4
lecture
hours)
- Adders, circuit and architecture
Text book
Digital Integrated Circuits: A Design Perspective, Jan Rabaey, A. Chandrakasan, and B. Nikolic, 2nd Edition, Printice Hall, ISBN 0-13-090996-3.
Project
A group IC design project is an essential component of this course. The project involves transistor-level digital circuit design, simulation and layout.