Ajoy Opal (He/Him)

Dr. Ajoy Opal is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo.

His current research interests include circuit and filter theory, numerical algorithms for analysis and design of analog and switched circuits, and mixed analog-digital circuits.

In addition to his research work, Dr. Opal has also written a book and published or presented papers in various journals and conferences. In 2010, he co-authored the book, Computer Methods for Analysis of Mixed-Mode Switching Circuits with Fei Yuan.

• Electrical Circuit Theory, Circuit Simulation, Analog Filter Design, Circuits Design & VLSI, Circuit theory and filter theory, Numerical algorithms for analysis of analog and switched circuits

• 1987, Doctorate Electrical Engineering, University of Waterloo, Canada
• 1984, Master's Electrical Engineering, University of Waterloo, Canada
• 1981, Bachelor's Electrical Engineering, Indian Institute of Technology, Delhi, India

• ECE 106 - Electricity and Magnetism
  • Taught in 2024
• ECE 140 - Linear Circuits
  • Taught in 2019, 2020, 2023, 2024

* Only courses taught in the past 5 years are displayed.

• Elghazali M., Sachdev M., and Opal A., An ESD transient clamp with 494 pA leakage current in GP 65 nm CMOS technology, Proceedings - International Symposium on Quality Electronic Design, ISQED, Volume 127, 214-220, Canada, 2018.
• Elghazali M., Sachdev M., and Opal A., An nMOS Static ESD Power Supply Clamp With Thyristor Delay Element and 180 pA Leakage in 65 nm CMOS Technology, IEEE Transactions on Device and Materials Reliability, Volume 18, 97-104, Canada, 2018.
• Elghazali M., Sachdev M., and Opal A., A low-leakage, robust ESD clamp with thyristor delay element in 65 nm CMOS technology, Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, Volume 127, 421-425, Canada, 2016.
• Charania T., Chuang P., Opal A., and Sachdev M., Suppression of on-chip power supply noise generated by a 64-bit static logic ALU block, IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC, Volume 7, 201-206, Canada, 2015.
• Elghazali M., Sachdev M., and Opal A., A low-leakage, hybrid ESD power supply clamp in 65nm CMOS technology, Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014, Canada, 2014.
• Elghazali M., Sachdev M., and Opal A., A hybrid ESD clamp with thyristor delay element and diodes for low-leakage applications, 2014 IEEE 12th International New Circuits and Systems Conference, NEWCAS 2014, 472-475, Canada, 2014.
• Charania T., Opal A., and Sachdev M., Analysis and design of on-chip decoupling capacitors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 21, 648-658, Canada, 2013.
• Charania T., Chuang P., Opal A., and Sachdev M., Analysis of power supply noise mitigation circuits, Canadian Conference on Electrical and Computer Engineering, 001250-001255, Canada, 2011.
• Zhu G., and Opal A., Efficient volterra series based sensitivity analysis of mildly nonlinear circuits, Midwest Symposium on Circuits and Systems, 722-725, Canada, 2007.
• Zhu G., and Opal A., Per-element decompostion in distortion analysis, Proceedings - IEEE International Symposium on Circuits and Systems, 449-452, Canada, 2007.