Mohamed-Yahia Dabbagh is an Electrical and Computer Engineering Lecturer at the University of Waterloo.
His research interests include digital signals, image processing and video processing. Professor Dabbagh is currently working on extending the approach to VLSI multiprocessor implementation of high demanding computational algorithms in the areas of Communication Systems, Computer Vision, and Control Systems. He is also looking into the development of algorithms in video motion estimation, video segmentation, and pattern recognition and classification.
In addition to his research contributions, Professor Dabbagh has published several articles with IEEE and other organizations regarding video and image systems.
- Digital Signal Processing
- Image and Video Processing
- 1989, Doctorate, PhD, North Carolina State University
- 1981, Master's, MSE, University of Michigan
- 1976, Bachelor's, BSE, University of Aleppo
- GENE 123 - Electrical Circuits and Instrumentation
- Taught in 2014, 2015, 2016, 2017
- ECE 140 - Linear Circuits
- Taught in 2014, 2015, 2016, 2018
- ECE 207 - Signals and Systems
- Taught in 2014, 2018
- Dabbagh, Mohamed-Yahia and Alexander, Winser E, Multiprocessor implementation of 2-D denominator-separable digital filters for real-time processing, IEEE Transactions on Acoustics, Speech, and Signal Processing, 37(6), 1989, 872 - 881
- Dabbagh, MY and Alexander, WE, Frequency domain implementation of block state space 2-D digital filters, Proc. 31st Midwest Symp. on Circ. and Syst, 1988
- Verma, Rohit and Dabbagh, Mohamed-Yahia, Binary pattern based edge detection for motion estimation in H. 264/AVC, Electrical and Computer Engineering (CCECE), 2013 26th Annual IEEE Canadian Conference on, January 2013, 1 - 4
- Verma, Rohit and Dabbagh, Mohamed-Yahia, Fast facial expression recognition based on local binary patterns, Electrical and Computer Engineering (CCECE), 2013 26th Annual IEEE Canadian Conference on, January 2013, 1 - 4
- Tsuei, Danny Teng-Hsiang and Dabbagh, Mohamed-Yahia and Sachdev, Manoj, Multiprocessor FPGA implementation of a 2D digital filter, Electrical and Computer Engineering (CCECE), 2011 24th Canadian Conference on, January 2011, 000630 - 000633