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Catherine Gebotys

Professor

Contact InformationCatherine Gebotys

Phone: 519-888-4567 x33539
Location: EIT 4014

Website

Biography Summary

Catherine H. Gebotys is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo, as well as the Associate Chair for Graduate Studies. She is also the Deputy Editor-in-Chief of the Institute of Electrical and Electronics Engineers (IEEE) Embedded Systems Letters, as well as an Associate Editor for DAES the Springer Verilag Journal.

Her current research interests include embedded systems security, side channel analysis for secure devices, security countermeasures for cryptographic algorithms, and countermeasures for hardware hacking – side channel, fault injection, microprobing and reverse engineering.

Professor Gebotys is the sole inventor of several patents and has also received numerous awards, including the CITO Champions of Innovation Award. In addition, she has collaborated with several companies including DRDC, XtremeEDA, Blackberry, Motorola, ViXS, and COMDEV.

Professor Gebotys has published a number of research papers in the areas of side channel analysis, embedded security, applied optimization for high-level hardware and software synthesis. She is the author of Security in Embedded Devices, as well as the co-author of Optimal VLSI Architectural Synthesis: area, performance and testability.

Research Interests

  • Security On SoCs
  • Power/EM Analysis
  • Security For Portable Devices
  • Low Power DSP Systems Design
  • Architectural Synthesis
  • Combinatorial Optimization
  • Design Automation For VLSI Systems
  • Computer & Software Engineering
  • Circuits Design & VLSI

Education

  • 1991, Doctorate, Electrical Engineering, University of Waterloo
  • 1984, Master's, Electrical Engineering, University of Toronto
  • 1982, Bachelor's, Engineering Science, University of Toronto

Courses

  • ECE 204A - Numerical Methods 1
  • ECE 124 - Digital Circuits and Systems
  • ECE 204A -

Selected/Recent Publications

  • Gebotys, Catherine H and White, Brian A and Mateos, Edgar, Preaveraging and carry propagate approaches to side-channel analysis of HMAC-SHA256, ACM Transactions on Embedded Computing Systems (TECS), 15(1), 2016
  • Gebotys, Catherine H and White, Brian A, A sliding window phase-only correlation method for side-channel alignment in a Smartphone, ACM Transactions on Embedded Computing Systems (TECS), 14(4), 2015
  • Juliato, Marcio and Gebotys, Catherine, A quantitative analysis of a novel SEU-resistant SHA-2 and HMAC architecture for space missions security, IEEE Transactions on Aerospace and Electronic Systems, 49(3), 2013, 1536 - 1554
  • Juliato, Marcio and Gebotys, Catherine, FPGA implementation of an HMAC processor based on the SHA-2 family of hash functions, University of Waterloo, Tech. Rep, 2011
  • Badrignans, Benoït and Champagne, David and Elbaz, Reouven and Gebotys, Catherine and Torres, Lionel, Sarfum: security architecture for remote FPGA update and monitoring, ACM Transactions on Reconfigurable Technology and Systems (TRETS), 3(2), 2010
  • Longa, Patrick and Gebotys, Catherine H, Analysis of Efficient Techniques for Fast Elliptic Curve Cryptography on x86-64 based Processors., IACR Cryptology ePrint Archive, 2010, 2010
  • Gebotys, Catherine H and White, Brian A, EM analysis of a wireless Java-based PDA, ACM Transactions on Embedded Computing Systems (TECS), 7(4), 2008
  • Longa, Patrick and Gebotys, Catherine H, Setting Speed Records with the (Fractional) Multibase Non-Adjacent Form Method for Efficient Elliptic Curve Scalar Multiplication., IACR Cryptology ePrint Archive, 2008, 2008
  • Gebotys, Catherine and White, Brian A, EM alignment using phase for secure embedded systems, Design Automation for Embedded Systems, 12(3), 2008, 185 - 206
  • Gebotys, Catherine H, Third Order Differential Analysis and A Split Mask Countermeasure For Low Energy Embedded Processors, Internet Citation,[Online] XP002455442, retrieved Oct, 18, 2007
  • Gebotys, Catherine H, A split-mask countermeasure for low-energy secure embedded systems, ACM Transactions on Embedded Computing Systems (TECS), 5(3), 2006, 577 - 612
  • Gebotys, Catherine H, A table masking countermeasure for low-energy secure embedded systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 14(7), 2006, 740 - 753
  • Muresan, Radu and Gebotys, Catherine, Instantaneous current modeling in a complex VLIW processor core, ACM Transactions on Embedded Computing Systems (TECS), 4(2), 2005, 415 - 451
  • Gebotys, Catherine H, Embedded Software, Low-Power Processors and Systems on Chips, 2005
  • Gebotys, Catherine H, Design of secure cryptography against the threat of power-attacks in DSP-embedded processors, ACM Transactions on Embedded Computing Systems (TECS), 3(1), 2004, 92 - 113
  • Muresan, R and Gebotys, C, Current dynamics-based macro-model for power simulation in a complex VLIW DSP processor, IEE Proceedings-Computers and Digital Techniques, 149(4), 2002, 173 - 187
  • Gebotys, Catherine H, A network flow approach to memory bandwidth utilization in embedded DSP core processors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 10(4), 2002, 390 - 398
  • Gebotys, C, The Influence of DSP Processor Architectures on Code Compilation Difficulties, , 2000
  • Gebotys, Catherine H and Gebotys, Robert J, Statistically based prediction of power dissipation for complex embedded DSP processors, Microprocessors and Microsystems, 23(3), 1999, 135 - 144
  • Gebotys, Catherine H, A minimum-cost circulation approach to DSP address-code generation, IEEE transactions on computer-aided design of integrated circuits and systems, 18(6), 1999, 726 - 741
  • Gebotys, Catherine H, Network flow approach to data regeneration for low energy embedded system synthesis, Integrated Computer-Aided Engineering, 5(2), 1998, 117 - 128
  • Gebotys, Catherine H, Optimizing energy during systems synthesis of computer intensive realtime applications, VLSI Design, 7(3), 1998, 303 - 320
  • Adve, Sarita and Burger, Doug and Eigenmann, Rudolf and Rawsthorne, Alasdair and Smith, M and Gebotys, Catherine and Kandemir, Mahmut and Lilja, D and Choudhary, Alok and Fang, Jesse and others, The interaction of architecture and compilation technology for high-performance processor design, IEEE Computer Magazine, 30(12), 1997, 51 - 58
  • Adve, Sarita V and Burger, Doug and Eigenmann, Rudolf and Rawsthorne, Alasdair and Smith, Michael D and Gebotys, Catherine H and Kandemir, Mahmut T and Lilja, David J and Choudbary, AN and Fang, Jesse Zhixi and others, Changing interaction of compiler and architecture, Computer, 30(12), 1997, 51 - 58
  • Barnwell III, Thomas P and Brockman, Jay B and Broderson, B and Cappello, Peter and Cathoor, Franky and Chao, Liang-Fang and Chau, Paul M and Ercegovac, Milos D and Gass, Wanda and Gebotys, Catherine H and others, Journal of VLSI Signal Processing, 11, 7 (1995) 9 1995 Kluwer Academic Publishers, Boston. Manufactured in The Netherlands., Journal of VLSI Signal Processing, 11, 1995
  • Gebotys, Catherine H, An optimal methodology for synthesis of DSP multichip architectures, Journal of VLSI signal processing systems for signal, image and video technology, 11(1-2), 1995, 9 - 19
  • Gebotys, Catherine H, An optimization approach to the synthesis of multichip architectures, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2(1), 1994, 11 - 20
  • Gebotys, Catherine H and Elmasry, Mohamed I, Global optimization approach for architectural synthesis, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 12(9), 1993, 1266 - 1278
  • Gebotys, Catherine H and Elmasry, Mohamed I, Testable Design Synthesis Methods', VLSI Fault Modeling and Testing Techniques, 1993
  • Gebotys, Catherine H, Synthesizing embedded speed-optimized architectures, IEEE journal of solid-state circuits, 28(3), 1993, 242 - 252
  • Gebotys, Catherine H, Throughput optimized architectural synthesis, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1(3), 1993, 254 - 261
  • Gebotys, Catherine H and Elmasry, Mohamed I, Optimal synthesis of high-performance architectures, IEEE Journal of Solid-State Circuits, 27(3), 1992, 389 - 397
  • Gebotys, Catherine H and Elmasry, Mohamed I, Integration of algorithmic VLSI synthesis with testability incorporation, IEEE Journal of Solid-State Circuits, 24(2), 1989, 409 - 417
  • Gebotys, Catherine H, Low-Power Processors and Systems on Chips,
  • Gebotys, Catherine H, Low-Power Electronics Design,
  • Ji, Xiaomei and Borriello, Gaetano and Cadambi, Srihari and Camposano, Raul and Catthoor, Francky and Chang, En-Shou and Chantrapornchai, Chantana and Chen, Fei and Chou, Pai and Cockx, Johan and others, Yu-Chin Hsu Henrik Hulgaard Tadatoshi Ishii Ahmed Amine Jerraya,
  • Baba, Kensuke and Baek, Joonsang and Barenghi, Alessandro and Birjoveanu, Catalin V and Blackburn, Simon R and Blough, Douglas and Blundo, Carlo and Botta, Alessio and Chabanne, Hervé and Chaumette, Serge and others, Elias Athanasopoulos, FORTH, Greece,
  • Gebotys, C, Recent Advances in DSP Programmable Processors and Compilation,
  • Adelstein, Frank and Agrawal, Dharma P and Aizenberg, Igor and Aloisio, Giovanni and Aoki, Kazumaro and Arabnia, Hamid and Asari, Vijayan and Attalah, Michail and Baber, Robert L and Bamford, Pascal and others, Additional referees,
  • Clark, Lawrence T and De, Vivek and Verbauwhede, Ingrid and Rampogna, Flavio and Pfister, Pierre-David and Arm, Claude and Volet, Patrick and Masgonty, Jean-Marc and Piguet, Christian and Slimani, Kamel and others, Low-Power Processors and Systems on Chips,
  • Longa, Patrick and Gebotys, Catherine, High-Speed Elliptic Curve Cryptography: New Records in Software,
  • Juliato, Marcio and Gebotys, Catherine and Sanchez, Ignacio Aguilar, 2012 IEEE First AESS European Conference on Satellite Telecommunications (ESTEL),
  • Gebotys, C, ESCE 700 TO2 Introduction to Optimization,
  • Barrientos, J and Bianchessi, AG and Cardoso, C and Castro, AR and Chakrabarti, PP and Chang, EJ and Creput, JC and Cristo, A and Cugola, G and Dafali, R and others, 2013 Index IEEE Embedded Systems Letters Vol. 5,
  • Nicolescu, Gabriela and Gerstlauer, Andreas and Al Faruque, Mohamed and Al-Hashimi, Bashir and Atienza, David and Bauer, Lars and Beltrame, Giovanni and Benini, Luca and Bergamaschi, Reinaldo and Bogdan, Paul and others, CODES+ ISSS 2015 Organization Program Co-chairs,
  • Juliato, Marcio and Gebotys, Catherine and Sanchez, Ignacio Aguilar, TPM-supported key agreement protocols for increased autonomy in constellation of spacecrafts, 2016 IEEE Aerospace Conference, January 2016, 1 - 9
  • Juliato, Marcio and Gebotys, Catherine and Sanchez, Ignacio Aguilar, On the specification of symmetric key management parameters for secure space missions, 2012 IEEE First AESS European Conference on Satellite Telecommunications (ESTEL), January 2012, 1 - 6
  • Mateos, Edgar and Gebotys, Catherine H, Side channel analysis using giant magneto-resistive (GMR) sensors, Proc. Second International Workshop on Constructive Side-Channel Analysis and Secure Design-COSADE, January 2011, 42 - 49
  • Zadeh, Amir Khatib and Gebotys, Catherine and Ardalan, Shahab, Counteracting power analysis attack using Static Single-ended Logic, 2011 IEEE International Symposium of Circuits and Systems (ISCAS), January 2011, 721 - 724
  • Aranha, Diego F and Karabina, Koray and Longa, Patrick and Gebotys, Catherine H and López, Julio, Faster explicit formulas for computing pairings over ordinary curves, Annual International Conference on the Theory and Applications of Cryptographic Techniques, January 2011, 48 - 68
  • Mateos, Edgar and Gebotys, Catherine H, A new correlation frequency analysis of the side channel, Proceedings of the 5th Workshop on Embedded Systems Security, January 2010
  • Juliato, Marcio and Gebotys, Catherine, An efficient fault-tolerance technique for the keyed-hash message authentication code, Aerospace Conference, 2010 IEEE, January 2010, 1 - 17
  • Longa, Patrick and Gebotys, Catherine, Efficient techniques for high-speed elliptic curve cryptography, International Workshop on Cryptographic Hardware and Embedded Systems, January 2010, 80 - 94
  • Juliato, Marcio and Gebotys, Catherine and Elbaz, Reouven, Efficient fault tolerant SHA-2 hash functions for space applications, 2009 IEEE Aerospace conference, January 2009, 1 - 16
  • Zadeh, Amir Khatib and Gebotys, Catherine, Side channel aware leakage management in nanoscale Cryptosystem-on-Chip (CoC), 2009 10th International Symposium on Quality Electronic Design, January 2009, 230 - 235
  • Ghaznavi, Solmaz and Gebotys, Catherine and Elbaz, Reouven, Efficient technique for the FPGA implementation of the aes mixcolumns transformation, 2009 International Conference on Reconfigurable Computing and FPGAs, January 2009, 219 - 224
  • Longa, Patrick and Gebotys, Catherine, Fast multibase methods and other several optimizations for elliptic curve scalar multiplication, International Workshop on Public Key Cryptography, January 2009, 443 - 462
  • Zadeh, Amir Khatib and Gebotys, Catherine, Leakage Power and Side Channel Security of Nanoscale Cryptosystem-on-Chip (CoC), 2009 IEEE Computer Society Annual Symposium on VLSI, January 2009, 31 - 36
  • Longa, Patrick and Gebotys, Catherine, Novel precomputation schemes for elliptic curve cryptosystems, International Conference on Applied Cryptography and Network Security, January 2009, 71 - 88
  • Juliato, Marcio and Gebotys, Catherine, Tailoring a reconfigurable platform to SHA-256 and HMAC through custom instructions and peripherals, 2009 International Conference on Reconfigurable Computing and FPGAs, January 2009, 195 - 200
  • Juliato, Marcio and Gebotys, Catherine, An approach for recovering satellites and their cryptographic capabilities in the presence of SEUs and attacks, Adaptive Hardware and Systems, 2008. AHS'08. NASA/ESA Conference on, January 2008, 101 - 108
  • Champagne, David and Elbaz, Reouven and Gebotys, Catherine and Torres, Lionel and Lee, Ruby B, Forward-secure content distribution to reconfigurable hardware, 2008 International Conference on Reconfigurable Computing and FPGAs, January 2008, 450 - 455
  • Ghaznavi, Solmaz and Gebotys, Catherine, A SEU-resistant, FPGA-based implementation of the substitution transformation in AES for security on satellites, 2008 10th International Workshop on Signal Processing for Space Communications, January 2008, 1 - 5
  • Juliato, Marcio and Gebotys, Catherine, SEU-resistant SHA-256 design for security in satellites, 2008 10th International Workshop on Signal Processing for Space Communications, January 2008, 1 - 7
  • Khatibzadeh, Amir and Gebotys, Catherine, Enhanced current-balanced logic (ECBL): An area efficient solution to secure smart cards against differential power attack, Fourth International Conference on Information Technology (ITNG'07), January 2007
  • Gebotys, Catherine H and White, Brian A, A phase substitution technique for DEMA of Embedded Cryptographic systems, Information Technology, 2007. ITNG'07. Fourth International Conference on, January 2007, 868 - 869
  • Gebotys, Catherine and Kurdahi, Fadi, Embedded systems, International Conference on Hardware Software Codesign: Proceedings of the 5 th IEEE/ACM international conference on Hardware/software codesign and system synthesis, January 2007
  • Gebotys, Catherine H and White, Brian A, Methodology for attack on a Java-based PDA, Proceedings of the 4th international conference on Hardware/software codesign and system synthesis, January 2006, 94 - 99
  • Gebotys, Catherine and Chou, Pai and Marwedel, Peter, Session 31: secure systems, Annual ACM IEEE Design Automation Conference: Proceedings of the 43 rd annual conference on Design automation, January 2006
  • Woo, Tim and Gebotys, Catherine and Naik, Sagar, An energy-efficient image representation for secure mobile systems, International Conference on Research in Networking, January 2005, 126 - 137
  • Gebotys, Catherine H and Ho, Simon and Tiu, Chin Chi, EM analysis of rijndael and ECC on a wireless java-based PDA, International Workshop on Cryptographic Hardware and Embedded Systems, January 2005, 250 - 264
  • Gebotys, Catherine H and Tiu, CC and Chen, X, A countermeasure for EM attack of a wireless PDA, International Conference on Information Technology: Coding and Computing (ITCC'05)-Volume II, January 2005, 544 - 549
  • Muresan, Radu and Gebotys, Catherine, Current flattening in software and hardware for security applications, Hardware/Software Codesign and System Synthesis, 2004. CODES+ ISSS 2004. International Conference on, January 2004, 218 - 223
  • Gebotys, Catherine H, Low energy security optimization in embedded cryptographic systems, Hardware/Software Codesign and System Synthesis, 2004. CODES+ ISSS 2004. International Conference on, January 2004, 224 - 229
  • Marwedel, Peter and Gebotys, Catherine, Secure and safety-critical vs. insecure, non safety-critical embedded systems: do they require completely different design approaches?, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, January 2004, 72 - 72
  • Gebotys, Catherine H and Zhang, Y, Security wrappers and power analysis for SoC technologies, Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, January 2003, 162 - 167
  • Gebotys, Catherine H and Gebotys, Robert J, A framework for security on NoC technologies, VLSI, 2003. Proceedings. IEEE Computer Society Annual Symposium on, January 2003, 113 - 117
  • Gebotys, Catherine H, Security-driven exploration of cryptography in DSP cores, Proceedings of the 15th international symposium on System Synthesis, January 2002, 80 - 85
  • Gebotys, Catherine H and Gebotys, Robert J, Secure elliptic curve implementations: an analysis of resistance to power-attacks in a DSP processor, International Workshop on Cryptographic Hardware and Embedded Systems, January 2002, 114 - 128
  • Muresan, Radu and Gebotys, Catherine H, Current consumption dynamics at instruction and program level for a VLIW DSP processor, Proceedings of the 14th international symposium on Systems synthesis, January 2001, 130 - 135
  • Gebotys, Catherine H, Utilizing memory bandwidth in DSP embedded processors, Design Automation Conference, 2001. Proceedings, January 2001, 347 - 352
  • Gebotys, Catherine H and Muresan, Radu, Modeling Power Dynamics for an Embedded DSP Processor Core. An Empirical Model, Proceedings of the IFIP TC10/WG10. 5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip: SOC Design Methodologies, January 2001, 205 - 216
  • Muresan, R and Gebotys, C, A dynamic programming approach to complex allocation in a DSP pipelined processor, Electrical and Computer Engineering, 2001. Canadian Conference on, January 2001, 1175 - 1181
  • Wiratunga, S and Gebotys, C, Methodology for minimizing power with DSP code, Electrical and Computer Engineering, 2000 Canadian Conference on, January 2000, 293 - 296
  • Gebotys, C and Gebotys, R and Wiratunga, S, Power minimization derived from architectural-usage of VLIW processors, Proceedings of the 37th Annual Design Automation Conference, January 2000, 308 - 311
  • Gebotys, Catherine H and Gebotys, Robert J, Designing for low power in complex embedded DSP systems, Systems Sciences, 1999. HICSS-32. Proceedings of the 32nd Annual Hawaii International Conference on, January 1999
  • Gebotys, Catherine H and Gebotys, Robert J, Complexities in DSP software compilation: performance, code size, power, retargetability, System Sciences, 1998., Proceedings of the Thirty-First Hawaii International Conference on, January 1998, 150 - 156
  • Gebotys, Catherine H and Gebotys, Robert J, An empirical comparison of algorithmic, instruction, and architectural power prediction models for high performance embedded DSP processors, Proceedings of the 1998 international symposium on Low power electronics and design, January 1998, 121 - 123
  • Gebotys, Catherine, DSP address optimization using a minimum cost circulation technique, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, January 1997, 100 - 103
  • Gebotys, Catherine H, Low energy memory and register allocation using network flow, Proceedings of the 34th annual Design Automation Conference, January 1997, 435 - 440
  • Gebotys, Catherine H, An efficient model for DSP code generation: performance, code size, estimated energy, Proceedings of the 10th international symposium on System synthesis, January 1997, 41 - 47
  • Gebotys, Catherine H and Gebotys, Robert J, Performance-power optimization of memory components for complex embedded systems, System Sciences, 1997, Proceedings of the Thirtieth Hawaii International Conference on, January 1997, 152 - 159
  • Gebotys, Catherine H and Gebotys, Robert J, Power minimization in heterogeneous processing, System Sciences, 1996., Proceedings of the Twenty-Ninth Hawaii International Conference on,, January 1996, 330 - 337
  • Gebotys, Catherine H, Low energy memory component design for cost-sensitive high performance embedded systems, Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996, January 1996, 397 - 400
  • Gebotys, Catherine H and Gebotys, Robert J, Optimized mapping of video applications to hardware-software for VLSI architectures, System Sciences, 1995. Proceedings of the Twenty-Eighth Hawaii International Conference on, January 1995, 41 - 48
  • Gebotys, C, Synthesizing optimal registerfile architectures for FPGA technology, Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994, January 1994, 233 - 236
  • Gebotys, Catherine H and Gebotys, Robert J, Application-specific architectures for field-programmable VLSI technologies, System Sciences, 1994. Proceedings of the Twenty-Seventh Hawaii International Conference on, January 1994, 124 - 130
  • Gebotys, Catherine H, Synthesis of throughput-optimized multichip architectures, Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993, January 1993, 5 - 2
  • Sarfi, RJ and Salama, MMA and Gebotys, C and Chikhani, AY, Optimal design of cathodic protection schemes: a power engineering applications, Electrical and Computer Engineering, 1993. Canadian Conference on, January 1993, 664 - 667
  • Gebotys, Catherine H and Gebotys, Robert J, Optimal mapping of DSP application to architectures, System Sciences, 1993, Proceeding of the Twenty-Sixth Hawaii International Conference on, January 1993, 116 - 123
  • Gebotys, Catherine H, Optimal scheduling and allocation of embedded VLSI chips, Design Automation Conference, 1992. Proceedings., 29th ACM/IEEE, January 1992, 116 - 119
  • Gebotys, Catherine H, Optimal synthesis of multichip architectures, Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design, January 1992, 238 - 241
  • Gebotys, Catherine H and Elmasry, Mohamed I, Simultaneous scheduling and allocation for cost constrained optimal architectural synthesis, Proceedings of the 28th ACM/IEEE Design Automation Conference, January 1991, 2 - 7
  • Gebotys, Catherine H and Elmasry, Mohamed I, VLSI design synthesis with testability, Proceedings of the 25th ACM/IEEE Design Automation Conference, January 1988, 16 - 21
  • Gebotys, Catherine H and Elmasry, Mohamed I, Integrated design and test synthesis, Computer Design: VLSI in Computers and Processors, 1988. ICCD'88., Proceedings of the 1988 IEEE International Conference on, January 1988, 398 - 401
  • Gebotys, Catherine H, Reliable Testable Secure Systems, Security in Embedded Devices, , 289 manuscript pages
  • Gebotys, Catherine H, Side Channel Attacks on the Embedded System, Security in Embedded Devices, , 222 manuscript pages
  • Gebotys, Catherine H, Introduction to Secure Embedded Systems, Security in Embedded Devices, , 27 manuscript pages
  • Gebotys, Catherine H, Countermeasures, Security in Embedded Devices, , 261 manuscript pages
  • Gebotys, Catherine H, Where Security Began, Security in Embedded Devices, , 12 manuscript pages
  • Gebotys, Catherine H, Data Integrity and Message Authentication, Security in Embedded Devices, , 161 manuscript pages
  • Gebotys, Catherine H, Elliptic Curve Protocols, Security in Embedded Devices, , 109 manuscript pages
  • Gebotys, Catherine H, Using Keys, Security in Embedded Devices, , 73 manuscript pages
  • Gebotys, Catherine H, Summary, Standards, and Ongoing Efforts, Security in Embedded Devices, , 294 manuscript pages
  • Gebotys, Catherine H, Symmetric Key Protocols Including Ciphers, Security in Embedded Devices, , 142 manuscript pages
  • Elbaz, Reouven and Champagne, David and Gebotys, Catherine and Lee, Ruby B and Potlapally, Nachiketh and Torres, Lionel, Hardware mechanisms for memory authentication: A survey of existing techniques and engines, Transactions on Computational Science IV, , 22 manuscript pages
  • Piguet, Christian and Gebotys, Catherine H, Low-Power Software Techniques, Low-Power Processors and Systems on Chips, , 1 manuscript pages
  • Piguet, Christian and Gebotys, Catherine H, Low-Power Software Techniques, Low-Power Electronics Design, , 1 manuscript pages
  • Gebotys, CH and Muresan, R, Modeling Power Dynamics for an Embedded DSP Processor Core, SOC Design Methodologies, , 216 manuscript pages
  • Gebotys, Catherine H, Synthesizing optimal application-specific DSP architectures, VLSI Design Methodologies for Digital Signal Processing Architectures, , 92 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Behavioral and Structural Interfaces, Optimal VLSI Architectural Synthesis, , 36 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Simultaneous Scheduling, and Selection and Allocation of Functional Units, Optimal VLSI Architectural Synthesis, , 108 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Introduction to Integer Programming, Optimal VLSI Architectural Synthesis, , 80 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, State of the Art Synthesis, Optimal VLSI Architectural Synthesis, , 61 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Oasic: Area-Delay Constrained Architectural Synthesis, Optimal VLSI Architectural Synthesis, , 122 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, A Methodology for Architectural Synthesis, Optimal VLSI Architectural Synthesis, , 95 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Interface Constraints, Optimal VLSI Architectural Synthesis, , 140 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Support for Algorithmic Constructs, Optimal VLSI Architectural Synthesis, , 128 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Global VLSI Design Cycle, Optimal VLSI Architectural Synthesis, , 20 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Summary and Future Research, Optimal VLSI Architectural Synthesis, , 270 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Oasic Synthesis Results, Optimal VLSI Architectural Synthesis, , 175 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, The Catree Architectural Synthesis with Testability, Optimal VLSI Architectural Synthesis, , 258 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Testability In Architectural Synthesis, Optimal VLSI Architectural Synthesis, , 205 manuscript pages
  • Gebotys, Catherine H and Elmasry, Mohamed I, Optimal VLSI architectural synthesis: area, performance and testability,
  • Gebotys, Catherine H, Security in embedded devices,
  • Muresan, Radu and Gebotys, CH, Modeling and applications of current dynamics in a complex processor core,
  • Gebotys, Catherine H, A Global Optimization Approach to Architectural Synthesis of VLSI Digital Synchronous Systems With Analog and Asynchronous Interfaces,
  • Gebotys, Catherine H and Elmasry, Mohamed I, Normal and Test Mode Design Synthesis,
  • Gebotys, Catherine H and Elmasry, Mohamed I, VLSI Design Synthesis Exploration With Testability Constraints,
  • Elmasry, Mohamed IY and Gebotys, Catherine H and University of Waterloo. Institute for Computer Research, VLSI Design Synthesis Exploration with Testability Constraints,
  • Smith, E and Gebotys, C, SCA countermeasures for ECC over binary fields on a VLIW DSP core, January 2003,
  • Gebotys, Catherine Helen, Security countermeasures for power analysis attacks, January
  • Gebotys, Catherine Helen, Table splitting for cryptographic processes, January
  • Gebotys, Catherine Helen, Security countermeasure for power analysis attacks, January
  • Gebotys, Catherine Helen, Table masking for resistance to power analysis attacks, January
  • Gebotys, Catherine Helen, Security countermeasures for power analysis attacks, January
  • Gebotys, Catherine Helen, Key masking for cryptographic processes, January
  • Gebotys, Catherine Helen, Table splitting for cryptographic processes, January
  • Gebotys, Catherine Helen, Table masking for resistance to power analysis attacks, January