Catherine H. Gebotys is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo, as well as the Associate Chair for Graduate Studies. She is also the Deputy Editor-in-Chief of the Institute of Electrical and Electronics Engineers (IEEE) Embedded Systems Letters, as well as an Associate Editor for DAES the Springer Verilag Journal.
Her current research interests include embedded systems security, side channel analysis for secure devices, security countermeasures for cryptographic algorithms, and countermeasures for hardware hacking – side channel, fault injection, microprobing and reverse engineering.
Professor Gebotys is the sole inventor of several patents and has also received numerous awards, including the CITO Champions of Innovation Award. In addition, she has collaborated with several companies including DRDC, XtremeEDA, Blackberry, Motorola, ViXS, and COMDEV.
Professor Gebotys has published a number of research papers in the areas of side channel analysis, embedded security, applied optimization for high-level hardware and software synthesis. She is the author of Security in Embedded Devices, as well as the co-author of Optimal VLSI Architectural Synthesis: area, performance and testability.
- Embedded security
- Security countermeasures
- Side channel analysis
- Fault injection analysis
- Photon emissions analysis
- 1991, Doctorate, Electrical Engineering, University of Waterloo
- 1984, Master's, Electrical Engineering, University of Toronto
- 1982, Bachelor's, Engineering Science, University of Toronto
- ECE 602 - Introduction to Optimization
- Taught in 2014, 2015
- ECE 204A - Numerical Methods 1
- Taught in 2017
- ECE 124 - Digital Circuits and Systems
- Taught in 2015, 2017, 2018
- Gebotys, Catherine H and White, Brian A and Mateos, Edgar, Preaveraging and carry propagate approaches to side-channel analysis of HMAC-SHA256, ACM Transactions on Embedded Computing Systems (TECS), 15(1), 2016
- Gebotys, Catherine H and White, Brian A, A sliding window phase-only correlation method for side-channel alignment in a Smartphone, ACM Transactions on Embedded Computing Systems (TECS), 14(4), 2015
- Juliato, Marcio and Gebotys, Catherine, A quantitative analysis of a novel SEU-resistant SHA-2 and HMAC architecture for space missions security, IEEE Transactions on Aerospace and Electronic Systems, 49(3), 2013, 1536 - 1554
- Juliato, Marcio and Gebotys, Catherine, FPGA implementation of an HMAC processor based on the SHA-2 family of hash functions, University of Waterloo, Tech. Rep, 2011
- Longa, Patrick and Gebotys, Catherine H, Analysis of Efficient Techniques for Fast Elliptic Curve Cryptography on x86-64 based Processors., IACR Cryptology ePrint Archive, 2010, 2010