Hiren Patel

Hiren Patel is an Electrical and Computer Engineering Assistant Professor and cross-appointed to the School of Computer Science at the University of Waterloo.

He is also the Information Director at ACM Transactions on Embedded Computing, an organization collecting relevant journals about current research regarding embedded computing. Additionally, Professor Patel is the Publication Chair of the ACM IEEE International Conference on Formal Methods and Models for System Design. He has written conference papers for events such as Design, Automation and Test in Europe (an event for electronic system design), and the Electronic Chips & System Design Initiative.

Professor Patel has research interests in cyber-physical and hybrid systems, embedded systems and real-time embedded processor architectures, hardware and software co-design methodologies, system-level design and verification methodologies, models of computation, computer architecture and compilers.

• Cyber-physical And Hybrid Systems
• Embedded Systems And Real-time Embedded Processor Architectures
• Hardware And Software Co-design Methodologies
• System-level Design And Verification Methodologies
• Models Of Computation
• Computer Architecture
• Compilers
• Connectivity And Internet Of Things
• Cybersecurity
• Infrastructure Integrity
• IoT
• Communications And Access

• 2007, Doctorate, Computer Engineering, Virginia Polytechnic Institute and State University
• 2003, Master's, Computer Engineering, Virginia Polytechnic Institute and State University
• 2001, Bachelor's, Computer Engineering, Virginia Polytechnic Institute and State University

• ECE 621 - Computer Organization
  • Taught in 2013, 2014, 2015
• ECE 200B -
  • Taught in 2014
• ECE 327 - Digital Hardware Systems
  • Taught in 2015
• ECE 429 - Computer Architecture
  • Taught in 2013, 2014, 2015, 2017
• ECE 400A - Electrical and Computer Engineering Practice
  • Taught in 2016
• ECE 222 - Digital Computers
  • Taught in 2013, 2016
• ECE 400A -
  • Taught in 2017, 2018

• Kashif, Hany and Gholamian, Sina and Patel, Hiren, SLA: A stage-level latency analysisfor real-time communicationin a pipelined resource model, IEEE Transactions on Computers, 64(4), 2015, 1177 - 1190
• Wang, Dan and Rajendiran, Aravindkumar and Ananthanarayanan, Sundaram and Patel, Hiren and Tripunitara, Mahesh V and Garg, Siddharth, Reliable Computing with Ultra-Reduced Instruction Set Coprocessors, IEEE Micro, 34(6), 2014, 86 - 94
• Vega, Augusto and Buyuktosunoglu, Alper and Bose, Pradip and Slijepcevic, Mladen and Kosmidis, Leonidas and Abella, Jaume and Quinones, Eduardo and Cazorla, Francisco J and Iturbe, Xabier and Ebrahim, Ali and others, 95 Awards, , 2014
• Kashif, Hany and Patel, H and Fischmeister, Sebastian and Hassan, M and Gholamian, S and Thomas, JJ and Kaushik, AM and Pellizzoni, R and Wang, D and Rajendiran, A and others, Path Selection for Real-Time Communication on Priority-Aware NoCs., Reliable Computing, 2014
• Gholamian, Sina and Kashif, Hany and Patel, Hiren D and Pellizzoni, Rodolfo and Fischmeister, Sebastian, HolisticNoC: A NoC-Aware Holistic Analysis for Distributing Hard Real-time Systems on CMPs, Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Tech. Rep. CAESR-TR-2012-05, 2013