Hiren Patel

Hiren Patel is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. Prior to the University of Waterloo, Hiren was a postdoctoral fellow at the University of California, Berkeley working in the Ptolemy group with Edward A. Lee. His research is in the design, analysis, and implementation of computer hardware and software. Currently, his research areas of interest are in real-time embedded systems, computer architecture, hardware architectures for machine learning and artificial intelligence, and security.

• Cyber-physical and hybrid systems
• Embedded systems and real-time embedded processor architectures
• Hardware and software co-design methodologies
• System-level design and verification methodologies
• Models of computation
• Computer Architecture
• Compilers
• Connectivity and Internet of Things
• Cybersecurity
• Infrastructure integrity
• IoT
• Communications and Access

• 2007, Doctorate, Computer Engineering, Virginia Polytechnic Institute and State University

• ECE 150 - Fundamentals of Programming
  • Taught in 2018, 2019, 2020
• ECE 320 - Computer Architecture
  • Taught in 2020, 2021
• ECE 400A - ECE Practice
  • Taught in 2017, 2018, 2019, 2020
• ECE 429 - Computer Architecture
  • Taught in 2017, 2018, 2019, 2020
• ECE 621 - Computer Organization
  • Taught in 2018

• Kashif, Hany and Gholamian, Sina and Patel, Hiren, SLA: A stage-level latency analysisfor real-time communicationin a pipelined resource model, IEEE Transactions on Computers, 64(4), 2015, 1177 - 1190
• Vega, Augusto and Buyuktosunoglu, Alper and Bose, Pradip and Slijepcevic, Mladen and Kosmidis, Leonidas and Abella, Jaume and Quinones, Eduardo and Cazorla, Francisco J and Iturbe, Xabier and Ebrahim, Ali and others, 95 Awards, , 2014
• Kashif, Hany and Patel, H and Fischmeister, Sebastian and Hassan, M and Gholamian, S and Thomas, JJ and Kaushik, AM and Pellizzoni, R and Wang, D and Rajendiran, A and others, Path Selection for Real-Time Communication on Priority-Aware NoCs., Reliable Computing, 2014
• Wang, Dan and Rajendiran, Aravindkumar and Ananthanarayanan, Sundaram and Patel, Hiren and Tripunitara, Mahesh V and Garg, Siddharth, Reliable Computing with Ultra-Reduced Instruction Set Coprocessors, IEEE Micro, 34(6), 2014, 86 - 94
• Gholamian, Sina and Kashif, Hany and Patel, Hiren D and Pellizzoni, Rodolfo and Fischmeister, Sebastian, HolisticNoC: A NoC-Aware Holistic Analysis for Distributing Hard Real-time Systems on CMPs, Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ontario, Tech. Rep. CAESR-TR-2012-05, 2013

• Currently considering applications from graduate students. A completed online application is required for admission; start the application process now.