Lan Wei

Lan Wei
Associate Professor, Tier 2 Canada Research Chair
Location: E5 4023
Phone: 519-888-4567 x31423

Biography

Dr. Lan Wei is an associate professor and Tier 2 Canada Research Chair in the Department of Electrical and Computer Engineering at the University of Waterloo.

She received her B.S. in Microelectronics and Economics from Peking University, Beijing, China, in 2005 and her M.S. and Ph.D. in Electrical Engineering from Stanford University, Stanford, USA (with Professor H.–S. Philip Wong), in 2007 and 2010, respectively. Before joining the University of Waterloo in 2014, Dr. Wei worked at Altera Corporation in San Jose, California, where her responsibilities included foundary technology evaluation, power management and Stratix X FPGA product development with Intel 14nm technology. She also worked as a postdoctoral associate in Microsystems Technology Laboratories, Massachusetts Institute of Technology, under Professor Dimitri Antoniadis. Her research focuses on device-circuit interactive design and optimization, cryogenic CMOS electronics for quantum computing, error-resilient computation, and integrated electronic systems using emerging technologies including GaN, RRAM and low-dimensional materials.

Dr. Wei has served on the Technical Program Committee of several academic conferences, including IEDM (2011-2012, 2021-2022), DATE (2021-), ICCAD (2019-), VLSI-TSA (2013-), GLSVLSI (2017-), ISQED (2019-), ISLPED (2013), etc., and was listed as one of the key contributors to the Process Integration, Devices, and Structures Chapter (PIDS) of the International Technology Roadmap for Semiconductors (ITRS) 2009 Edition. She is the co-developer of the MIT Virtual Source GaN HEMT (MVSG) Compact Model, which is an industry standard approved and supported by the Compact Model Coalition for GaN HEMT compact model.

Research Interests

  • Nanoelectronic devices

  • Device-circuit interactive design and optimization

  • Cryogenic CMOS electronics for quantum computing

  • GaN-based devices and circuits

  • Low-dimensional materials based integrated nanoelectronic systems

  • RRAM device, circuit, and integrated system

  • Device-circuit interactive design

  • Error-resilient computing

Industrial Research

Prof. Wei's group is responsible for MIT virtuall-source Galliuam-nitride field effect transistor (MVSG) compact model, which is an industry-standard GaN FET compact model used globally. The latest publicly available MVSG model can be downloaded through Compact Model Coalition (https://si2.org/standard-models/).

Education

  • 2010, Ph.D., Electrical Engineering, Stanford University, U.S.A.

  • 2007, Master of Science, Electrical Engineering, Stanford University, U.S.A.

  • 2005, Bachelor of Science, Microelectronics and Economics, Peking University, China

Awards

  • 2019 Ontario Early Researcher Award

  • 2020 UWaterloo President's Excellence Award in Research

Teaching*

  • BME 294 - Circuits, Instrumentation, and Measurements
    • Taught in 2024, 2025
  • ECE 240 - Electronic Circuits 1
    • Taught in 2021, 2022, 2023, 2025
  • ECE 445 - Integrated Digital Electronics
    • Taught in 2021, 2022, 2025
  • ECE 630 - Physics and Models of Semiconductor Devices
    • Taught in 2025
  • ECE 730 - Special Topics in Solid State Devices
    • Taught in 2021, 2024
  • MTE 481 - Mechatronics Engineering Design Project
    • Taught in 2022

* Only courses taught in the past 5 years are displayed.

In The News

Graduate studies

I am currently seeking to accept graduate students. Please submit your graduate studies application and include my name as a potential advisor.