Mark Aagaard, PEng

Mark Aagaard is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Waterloo.

His research interests include formal methods for the design and verification of digital-hardware systems. He has developed a formal theory for pipelined circuits based on the conventional ideas of structural hazards, control hazards, data hazards and datapath functionality. Dr. Aagaard’s current research activities use different formalization aspects of pipeline hazards to explore new design and verification techniques for varying classes of hazards.

Some recent projects of Dr. Aagaard’s include verifying data-hazard accuracy, exploiting the power and usability of an off-the-shelf combinational equivalence checker, and developing a prototype design and verification tool that includes a cell library of control components for pipeline stages. Dr. Aagaard also took part in creating the Microbox framework for microprocessor correctness statements, where over 30 published verification results were analyzed and proved correctness statement conditions.

• Formal verification, Design and verification of digital hardware system, Computer architecture, Computer & software engineering, Connectivity and internet of things, Wireless communications and networks, Cybersecurity, Application security, Information security, Infrastructure integrity, Network Security, Connectivity and Internet of Things, IoT, Devices, Application domains, Dependability and security,

• 1994, Doctorate Electrical Engineering, Cornell University, United States
• 1991, Master of Science Electrical Engineering, Cornell University, United States
• 1988, Bachelor of Science (BS) Electrical Engineering, Harvey Mudd College, United States

• ECE 108 - Discrete Mathematics and Logic 1
  • Taught in 2024
• ECE 327 - Digital Hardware Systems
  • Taught in 2019, 2020
• ECE 627 - Register-transfer-level Digital Systems
  • Taught in 2020

* Only courses taught in the past 5 years are displayed.