Location: E7 5432
Phone: 519-888-4567 x42864
Mahesh V. Tripunitara is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. He has had previous industry experience including four years in software development at Silicon Valley, and three years in research with the Security and Privacy Technology Lab at Motorola's corporate R&D Labs.
Since 2013, Professor Tripunitara has been a Program Committee member at conferences such as the ACM Conference on Computer and Communications Security (CCS), the ACM Conference on Data and Application Security and Privacy (CODASPY), and the ACM Symposium on Access Control Models and Technologies (SACMAT).
Professor Tripunitara’s main research area of interest is information security and his projects involve both fundamental and applied aspects. He has completed work in authorization and access control, cryptographic key transport, secure payments, usable security, and security and reliability of computer hardware.
Professor Tripunitara has written and published many papers including Securing Computer Hardware Using 3D Integrated Circuit (IC) Technology and Split Manufacturing for Obfuscation, which won the Best Student Paper award at the 22nd Usenix Security Symposium, and Least-Restrictive Enforcement of the Chinese Wall Security Policy, co-written with his Ph.D. graduate Alireza Sharifi, which won the Best Paper Award at the 18th ACM SACMAT.
- Computer & Software Engineering, Information security, Authorization and access control, Cryptographic key transport, Secure payments, Usable security, Security and reliability of computer hardware, Connectivity and Internet of Things, Cybersecurity, Application security, Privacy and cryptography, Information security, IoT, Dependability and security,
- 2005, Doctorate Computer Science, Purdue University, United States
- 1995, Master's Computer Science, Purdue University, United States
- 1993, Bachelor of Science (BSc) Computer Science, Dalhousie University, Nova Scotia
- ECE 108 - Discrete Mathematics and Logic 1
- ECE 406 - Algorithm Design and Analysis
- ECE 606 - Algorithm Design and Analysis
- Taught in 2019, 2020, 2021, 2022
* Only courses taught in the past 5 years are displayed.
- Kashif, Hany and Patel, H and Fischmeister, Sebastian and Hassan, M and Gholamian, S and Thomas, JJ and Kaushik, AM and Pellizzoni, R and Wang, D and Rajendiran, A and others, Path Selection for Real-Time Communication on Priority-Aware NoCs., Reliable Computing, , 2014
- Woo, Jeffrey Lok Tin and Tripunitara, Mahesh V, Composing Kerberos and Multimedia Internet KEYing (MIKEY) for AuthenticatedTransport of Group Keys, IEEE Transactions on Parallel and Distributed Systems, 898, 2014
- Wang, Dan and Rajendiran, Aravindkumar and Ananthanarayanan, Sundaram and Patel, Hiren and Tripunitara, Mahesh V and Garg, Siddharth, Reliable Computing with Ultra-Reduced Instruction Set Coprocessors, IEEE Micro, 86, 2014
- Rehman, Ahmad Saif Ur and Oliveira, Augusto Born and Tripunitara, Mahesh and Fischmeister, Sebastian, The use of mTags for mandatory security: a case study, Software: Practice and Experience, 1511, 2014
- Vega, Augusto and Buyuktosunoglu, Alper and Bose, Pradip and Slijepcevic, Mladen and Kosmidis, Leonidas and Abella, Jaume and Quinones, Eduardo and Cazorla, Francisco J and Iturbe, Xabier and Ebrahim, Ali and others, 95 Awards, , , 2014