Graduate Mentor's supervisor: Prof. Trevor Brown
As discussed in the description of Project 14, recent work has shown that memory layout can have a substantial impact on the performance of modern applications. HeapLENS was developed to help researchers understand and improve memory layouts by automatically collecting and analyzing relevant information about object placement and memory utilization.
However, an important open question is how memory layout changes across different executions of the same program. Modern operating systems employ Address Space Layout Randomization (ASLR), a security mechanism that intentionally changes the placement of memory regions between executions. While ASLR is not designed as a performance feature, it can indirectly affect application performance by altering memory layouts and their interactions with the memory hierarchy.
Recent experiments have revealed surprisingly large performance variation across repeated executions of some applications, even after taking standard benchmarking precautions. One possible explanation is that ASLR produces memory layouts with significantly different performance characteristics. If so, an important challenge is determining how these layouts differ and identifying the memory-layout properties responsible for the observed performance changes.
A possible research direction is to develop techniques and tools for detecting ASLR-induced performance variation, comparing memory layouts across executions, and identifying the characteristics that distinguish faster and slower runs. Such a tool could potentially build upon HeapLENS and leverage AI-assisted analysis to help explain observed performance differences.
The students will work on developing techniques and tools for identifying and explaining ASLR-induced performance variation in modern applications. This will involve the design and implementation of new functionality, experimental studies of performance variability across executions, and analyses aimed at identifying the memory-layout characteristics that distinguish faster and slower runs. Strong results may lead to the preparation of a research paper for publication.
This project is best suited for students who are comfortable programming in C++ and have completed CS 240/CS 240E (or have equivalent knowledge in data structures). Prior experience with multithreaded programming, operating systems, memory management, performance analysis, or concurrent data structures is helpful but not required. Students should be willing to learn new concepts independently, engage with research papers and technical documentation, and use modern AI tools as part of the research and development process.