Thursday, February 25, 2016 1:30 pm
-
1:30 pm
EST (GMT -05:00)
Candidate
Govindakrishnan Radhakrishnan
Topic
Implementation of STT-RAM Memory Array in 65nm CMOS Technology
Supervisors
Manoj Sachdev and Youngki Yoon
Background subjects
- VLSI Circuit Design
- Semiconductor Device Physics and Modelling
- Computational Nanoelectronics