ECE 730 Topic 9 - Spring 2014

ECE 730 Topic 9 - VLSI Quality, Reliability and Yield Engineering

Instructor

Manoj Sachdev

Calendar Description

This course covers issues concerning VLSI quality and reliability. Topics covered are, overview of VLSI quality and reliability trends; basic reliability concepts; causes of reliability failures; quality, reliability improvement techniques and measures.

Prerequisite

ECE 445

Detailed description

Detailed course outline
Course content Lecture hours
Introduction and Basic Concepts
  • Defects, faults, errors, fault models
  • VLSI testing, quality and reliability trends
3
Reliability Concepts and modeling
  • Reliability theory
  • Causes of reliability failures , Mean time to failure
  • Reliability distributions
3
Defect monitoring and yield engineering
  • Local and global defects
  • Defect and process control monitors
  • Defect modeling
6
Electrical Overstress and Electrostatic Discharge
  • Sources ESD and EOS
  • ESD Models and Testing
  • ESD Protection Circuits
  • Latchup
6
Gate Oxide Breakdown
  • Causes of gate Oxide Breakdown
  • Breakdown Models
  • Acceleration Factors
  • Life Test
4
Electo-migration
  • Causes for Electro-migration
  • Techniques to Extend Mean Time To Failure
  • Acceleration Factors
4
Soft Errors
  • Sources of Radiation
  • Effect of Radiation on ICs
  • Design and Circuit Consideration for Soft Error Mitigation
6
Functional Yield Modeling
  • Yield Models and Statistics
  • Classes of Yield Models
  • Application of Yield Models
4

Total lecture hours: 36

Project

An individual project is an essential component of this course.