ECE 642 - Winter 2018

ECE 642 - Radio Frequency Integrated Circuit Design

Transistor-level design of circuits for wideband RF and high-speed data communication front-ends. On- chip passive component design and simulation aimed at maximizing RF performance are discussed in detail. Circuit examples include: wideband preamplifiers and gain blocks, I-Q up/downconverters, voltage- and digitally-controlled oscillators (VCO/DCO), etc. Design of circuit blocks for mm-wave frequency applications and RF testing, packaging and characterization are also discussed, time permitting.

Lecturer: J.R. Long, E5-4022, jrlong@uwaterloo.ca

Prerequisites: ECE 444, 331 (or equivalents); SPICE simulation experience.

Week Lecture Topics
1 - 2

Overview of radio-frequency integrated circuits (RFIC) and circuit design review. Transceiver link analysis and relationship to RF circuit specifications.

3 - 4

Characterization of silicon MOSFETs and SiGe-HBTs, and CMOS/BiCMOS technologies for RF and high-speed applications. Feedback and wideband preamplifiers.

5 - 6

On-chip passive components: capacitors, varactors, resistors, interconnect and transmission lines, inductors,  transformers.

7 - 8

Oscillators. L-C oscillator topologies. Resonant tanks and oscillator tuning. VCO/DCO design for RF transceivers up to mm-wave frequencies.

9 - 10

Up and down conversion mixers. Linear multipliers. Mixer input and commutation stages. RFIC approaches for low voltage/low power and high linearity mixing. I/Q mixers and quadrature up/ downconversion. LNA/mixer interfacing.

11 - 12

RFIC design for mm-wave frequency applications.

References:

  1. B. Razavi, RF Microelectronics, 2nd edition, Prentice-Hall, 2011.
  2. D. Pozar, Microwave Engineering, 4th edition, Wiley, 2011.
  3. S.P. Voinigescu, High-Frequency Integrated Circuits, Cambridge University Press, 2013.
  4. RFIC Virtual Journal: http://ieeexplore.ieee.org/virtual-journals/rfic

Also: IEEE Journal of Solid-State Circuits and Transactions on Microwave Theory and Techniques; Proceedings of the ISSCC, RFIC Symposium, CICC, ESSCIRC conferences.

Assignments:  5 for 50% total (hand-in of all assignments required, late work penalty is 5% per day)

Examination:  50% final (open book)