MASc seminar - Frank Imeson

Thursday, March 14, 2013 2:00 pm - 2:00 pm EDT (GMT -04:00)

Candidate

Frank Imeson

Title

Leveraging 3D Integrated Circuit Manufacturing Technology to Enhance the Security of Computer Hardware

Supervisors

Garg, Siddharth and Tripunitara, Mahesh

Abstract

A vast majority of semiconductor companies are now 'fabless',(e.g., AMD, NVidia, Xilinx etc.) - they outsource integrated circuit (IC) fabrication to external IC foundries typically located off shore. There is, thus, an increased threat of a circuit being maliciously modified during IC manufacturing at an untrusted foundry. The outcome of potential attacks range from breaking encryption schemes, to hijacking control of crucial systems such as satellites, weapons, and so on. In this talk I will present a method to enhance the security of the IC fabrication process by leveraging an emerging technology known as 3D integration. 3D ICs consist of two or more separately manufactured ICs that are vertically stacked after they come back from the foundry. Splitting an IC into two or more components allows us to hide a portion of the circuit from the malicious attacker, in effect obfuscating the circuit and thus deterring the attack. I will present a formal notion of security for this 3D IC based circuit hiding, characterize the complexity class of computing security under this notion, and discuss techniques to achieve desired security levels. Using benchmark circuits, I will highlight the cost vs. security trade-offs introduced by the proposed techniques.