Candidate: Xinzhe Wang
Date: July 26, 2024
Time: 12:00pm
Location: Online
Supervisors: Professors Hiren Patel and Rodolfo Pellizzoni
All are welcome!
Abstract:
This thesis focuses on the design of the cache subsystem for multicore real-time systems. Specifically, it looks at the two common contention sources in the cache subsystem that undermines the system's timing predictability: temporal contention (queuing delays resulting from simultaneous shared resource accesses) and spatial contention (conflicts in cache line allocations). Accordingly, this thesis proposes two solutions to address the two problems, respectively. (1) To address temporal contention induced by the shared LLC, we propose PECC, a predictable exclusive cache coherence mechanism. Unlike the common choice of inclusive cache hierarchies, PECC incorporates an exclusive LLC free of back invalidation, which is a significant contributor to the per-request worst-case latency (PR-WCL) in inclusive hierarchies. As a result, PECC achieves a lower PR-WCL and higher average performance than all its inclusive counterparts proposed in this literature. (2) To address spatial contention in the shared LLC, we propose ParRP, a novel cache partitioning scheme that provides cache space isolation for shared data. Conventionally, achieving cache space isolation for shared data is challenging due to its intrinsic sharing nature, which violates the resource isolation principle. ParRP overcomes this by partitioning the replacement policy instead of cache entries. Consequently, ParRP guarantees isolation property even with shared data, enabling isolated worst-case execution time (WCET) analysis without interference from other cores. This can lead to a significant reduction in the WCET of tasks sharing data.