MASc seminar - Stanley Omokhudu ItuahExport this event to calendar

Thursday, August 6, 2015 — 2:00 PM EDT

Candidate

Stanley Omokhudu Ituah

Title

High Frequency Receiver Front-End Module for Active Antenna Applications

Supervisor

Safieddin Safavi-Naeini

Abstract

Array antennas have been applied to wireless applications as an alternative means of realising high gain radiation patterns using low gain antenna elements. By adjusting the amplitude and phase excitation of each element the shape (beam-forming) and direction (beam-steering) of the radiation pattern can also be controlled. These “active antennas” offer a means to maximize the communication link through digital beam control. In the design of conventional satellite receivers, the antenna is usually specified by the gain/directivity, gain-to-temperature ratio (G/T), side-lobe level and polarisation. One major challenge in designing low-cost, high gain active antenna systems is the development of single-channel receiver modules that meet the power, noise and radiation pattern requirements of the conventional antenna when used in large arrays.

This seminar presents the design of a K-band CMOS integrated phase shifter in an active antenna receiver front-end module. The digital phased shifter specifications are analysed using the effect of "quantization lobes" to estimate the minimum resolution required to meet the side-lobe level (SLL) requirement. The design of a 5-bit digital phase shifter utilizing quadrature signal modulation is presented. A modified quadrature all-pass filter is shown to correct the loading effects of the variable gain amplifiers (sub-VGAs) in the phase shifter. A current-based digital-to-analog converter (DAC) with unique digital correction logic capable of implementing true 5-bit phase resolution is also presented. Finally, an integrated buffer and differential-to-single ended converter provide a low-power 50 Ohm interface. The phase shifter is fabricated in 65nm CMOS attaining less than 5 degree rms phase error, less than 2dB gain variation, and greater than 10dB return loss from 16-21 GHz (25% bandwidth). The entire design including bias uses only 5mW of power.

A schematic level design of the proposed single-channel array is presented with a low noise amplifier (LNA), variable gain amplifier (VGA), a hybrid coupler and switch. Simulations results verify that in addition to the 5-bit digital phase control, the receiver module achieves 2.6dB noise figure and can be used to generate two hands of polarisation (right and left) with less than 1.1dB axial ratio.

Location 
E5 building
Room 4106/4128

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