PhD comprehensive examination - Govindakrishnan RadhakrishnanExport this event to calendar

Thursday, February 25, 2016 — 1:30 PM EST

Candidate

Govindakrishnan Radhakrishnan

Topic

Implementation of STT-RAM Memory Array in 65nm CMOS Technology

Supervisors

Manoj Sachdev and Youngki Yoon

Background subjects

  • VLSI Circuit Design
  • Semiconductor Device Physics and Modelling
  • Computational Nanoelectronics
Location 
EIT building
Room 3145

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