Events

Filter by:

Limit to events where the first date of the event:
Date range
Limit to events where the first date of the event:
Limit to events where the title matches:
Limit to events where the type is one or more of:
Limit to events tagged with one or more of:
Limit to events where the audience is one or more of:
Friday, November 26, 2021 6:00 pm - 6:00 pm EST (GMT -05:00)

Implementing FPGA-optimized Systolic Arrays using 2D Knapsack and Evolutionary Algorithms

Candidate: Harry Chan Chan
Title: Implementing FPGA-optimized Systolic Arrays using 2D Knapsack and Evolutionary Algorithms

Date: November 26, 2021
Time: 18:00
Place: MS Teams
Supervisor(s): Kapre, Nachiket

Abstract:
Underutilization of FPGA resources is a significant challenge in the deployment of FPGAs as neural network accelerators.
We propose an FPGA-optimized systolic array architecture to improve the CNN inference throughput by orders of magnitude through

Thursday, December 2, 2021 3:00 pm - 3:00 pm EST (GMT -05:00)

Interval Type Inference: Improvements and Evaluations

Candidate: Di Wang
Title: Interval Type Inference: Improvements and Evaluations

Date: December 2, 2021
Time: 15:00
Place: MS Teams
Supervisor(s): Dietl, Werner

Abstract:
Interval analysis estimates the run-time intervals of numerical expressions in the source code by computing a lower bound and an
upper bound. Interval analysis for integral types is useful in providing facts of the target program to help developers find

Wednesday, December 8, 2021 12:00 am - 12:00 am EST (GMT -05:00)

Degraded Reference Image Quality Assessment

Candidate: Xinyu Guo
Title: Degraded Reference Image Quality Assessment
Date: December 8, 2021
Time: 12:00
Place: MS Teams
Supervisor(s): Wang, Zhou

Abstract:
Images/videos are playing a more and more important role in the 21st century. The perceived quality of visual content often
degrades during the process of acquisition, storage, transmission, display and rendering. Since subjective evaluation of such a

Thursday, December 9, 2021 9:30 am - 9:30 am EST (GMT -05:00)

Multi-Sector Demand Side Management in Smart Cities

Candidate: Sherin Adel Helal
Title: Multi-Sector Demand Side Management in Smart Cities
Date: December 9, 2021
Time: 9:30
Place: online
Supervisor(s): Salama, Magdy - Shaaban, Mostafa (Adjunct)

Abstract:
Environmental concerns are on an all time high and can no longer be ignored. The majority of electricity is generated using
fossil fuels, this is troublesome as fossil fuels are depleting off the face of the earth. Moreover, they contribute heavily to

Thursday, December 9, 2021 1:00 pm - 1:00 pm EST (GMT -05:00)

Managing HBM’s bandwidth in Multi-Die FPGAs using Overlay NoCs

Candidate: Srinirdheeshwar Kuttuva Prakash
Title: Managing HBM’s bandwidth in Multi-Die FPGAs using Overlay NoCs
Date: December 9, 2021
Time: 13:00
Place: online
Supervisor(s): Kapre, Nachiket - Patel, Hiren

Abstract:
We can improve HBM bandwidth distribution and utilization on a multi-die FPGA like Xilinx Alveo U280 by using Overlay
Network-on-Chips (NoCs). HBM in Xilinx Alveo U280 offers 8GBs of memory capacity with a theoretical maximum bandwidth of 460

Candidate: Bianca Esanu
Title: An Assessment of, and Improvements to, the Digital Forensics Acquisition Process of a Law Enforcement Agency
Date: December 10, 2021
Time: 13:00
Place: MS Teams
Supervisor(s): Tripunitara, Mahesh

Abstract:
Forensics addresses the collection and analysis of evidence. Digital forensics is forensics in the context of digital devices. It
is a rapidly evolving field employed in various organizations such as law enforcement, government, and the private sector. The

Candidate: Zack Strike
Title: Preliminary Development of a Microfluidic Tool for the Characterization of Molecular Machines
Date: December 14, 2021
Time: 13:00
Place: online
Supervisor(s): Backhouse, Chris (Adjunct) - Wright, Derek

Abstract:
Droplet interface bilayers (DIBs) have been proposed as a key tool to better study transmembrane proteins and their quantum
biology. This work focused on developing a microfluidic device for the formation of DIBs.

Thursday, December 16, 2021 3:00 pm - 3:00 pm EST (GMT -05:00)

Worst-Case Latency Analysis for the Versal Network-on-Chip

Candidate: Ian Elmor Lang
Title: Worst-Case Latency Analysis for the Versal Network-on-Chip
Date: December 16, 2021
Time: 15:00
Place: online
Supervisor(s): Kapre, Nachiket - Pellizzoni, Rodolfo

Abstract:
The recent line of Versal FPGA devices from Xilinx Inc. includes a hard NetworkOn-Chip (NoC) embedded in the programmable logic,
designed to be a high-performance system-level interconnect. While the target markets for Versal devices include applications

Wednesday, December 22, 2021 1:00 pm - 1:00 pm EST (GMT -05:00)

XC: Exploring Quantitative Use Cases for Explanations in 3D Object Detection

Candidate: Sun Sheng Gu
Title: XC: Exploring Quantitative Use Cases for Explanations in 3D Object Detection
Date: December 22, 2021
Time: 13:00
Place: online
Supervisor(s): Czarnecki, Krzysztof

Abstract:
Explainable AI (XAI) methods are frequently applied to obtain qualitative insights
about deep models’ predictions. However, such insights need to be interpreted by a human
observer to be useful. In this thesis, we aim to use explanations directly to make decisions