DLS: Margaret Martonosi - Power-Aware Computing, Heterogeneous Parallelism, and the Post-ISA EraExport this event to calendar

Friday, June 12, 2015 — 4:30 PM EDT

Margaret Martonosi Margaret Martonosi 
Princeton

Friday, June 12, 2015 • DC 1302 • 4:30 p.m.

Abstract: Computer systems have faced significant power challenges at many points in their history, but over the past 20 years, these challenges have shifted from mainly being addressed at the devices and circuits level, to their current position as first-order constraints for architects and software developers. Parallelism, heterogeneity, and specialization have been major architecture levers for achieving power efficiency, especially inside smartphones and mobile devices. Unfortunately, they greatly reduce the abstraction value of instruction set architectures, and as a result, they come with increased challenges for software reliability, interoperability, and performance portability. My talk will discuss work both by my own group and by the field overall to address power challenges while meeting performance, reliability and portability goals on platforms from smartphones to data centers.

Bio: Margaret Martonosi is the Hugh Trumbull Adams '35 Professor of Computer Science at Princeton University, where she has been on the faculty since 1994. Martonosi's research focuses on computer architecture and mobile computing, particularly power-efficient systems. Past projects include the Wattch power modelling tool and the ZebraNet mobile sensor network, which was deployed for wildlife tracking in Kenya. Martonosi is a Fellow of both IEEE and ACM. Her major awards include Princeton University's 2010 Graduate Mentoring Award, the Anita Borg Institute's 2013 Technical Leadership Award, and NCWIT's 2013 Undergraduate Research Mentoring Award.
 
Location 
DC - William G. Davis Computer Research Centre

200 University Avenue West

Waterloo, ON N2L 3G1
Canada

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