Please note: This seminar will take place in DC 1304.
Gerasimos Gerogiannis, PhD candidate
Electrical & Computer Engineering, University of Illinois at Urbana–Champaign
With the end of Dennard scaling and the slowing of Moore’s Law, performance improvements in general-purpose processors have plateaued. Computing is increasingly moving away from general-purpose processors to a highly heterogeneous ecosystem centered around hardware specialization. In this emerging landscape, a diverse range of accelerators are deployed, from the edge to the cloud. These accelerators have already enabled significant advances in domains such as machine learning. However, when such heterogeneous accelerators are integrated into end-to-end systems, the interactions between the various system components introduce a set of novel and interconnected challenges: excessive control and data movement overheads, the rising complexity of performance tuning, and bottlenecks imposed by the non-specialized system components. These challenges limit the full potential of accelerator-based computing.
In this talk, I will present my efforts to overcome these barriers by re-architecting and co-designing end-to-end computing stacks around heterogeneity — from compute units to communication networks, algorithms, and optimizing compilers. First, I will show how co-designing and tightly integrating accelerators with their host processors can eliminate unnecessary control and data movement overheads. Then, I will demonstrate how data-driven techniques such as reinforcement learning can be utilized to automate and simplify the performance optimization of emerging hardware accelerators. Finally, I will discuss how treating the networking hardware and communication algorithms as specialization targets can enable scalable distributed accelerator systems. Collectively, these efforts point towards fundamentally more efficient computing architectures that abandon legacy processor-centric design assumptions and embrace heterogeneity at every level.
Bio: Gerasimos Gerogiannis is a final-year PhD candidate at the University of Illinois at Urbana–Champaign. His research focuses on computer architecture, with an emphasis on heterogeneous computing using accelerators for artificial intelligence and scientific applications.
His work has appeared in top-tier venues in computer architecture and machine learning, including ISCA, MICRO, HPCA, ASPLOS, and ICML. He has filed four U.S. patents with Intel on processor–accelerator co-design for machine learning workloads. Among other awards, his research has been recognized with one IEEE MICRO Top Pick and one Honorable Mention.